H03F3/3066

Amplification device
10862437 · 2020-12-08 ·

An amplification device comprising: a push pull circuit which amplifies an input signal; a diamond buffer circuit to which the signal which is amplified by the push pull circuit is input; and a current mirror circuit which is connected to a power supply and the diamond buffer circuit and is connected to a retraction current terminal of the push pull circuit.

SLEW BOOST CIRCUIT FOR AN OPERATIONAL AMPLIFIER
20200321932 · 2020-10-08 ·

A differential input stage of a circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. Drains of the first and third transistors couple together at a first node, and drains of the second and fourth transistors couple together at a second node. A first slew boost circuit includes a fifth transistor and a first current mirror. A gate of the fifth transistor couples to the second node. A source of the fifth transistor couples to the first node. The first current mirror couples to the fifth transistor and to the second node. A second slew boost circuit includes a sixth transistor and a second current mirror. A gate of the sixth transistor couples to the first node. A source of the sixth transistor couples to the second node. The second current mirror couples to the sixth transistor and to the first node.

Slew boost circuit for an operational amplifier

A differential input stage of a circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. Drains of the first and third transistors couple together at a first node, and drains of the second and fourth transistors couple together at a second node. A first slew boost circuit includes a fifth transistor and a first current mirror. A gate of the fifth transistor couples to the second node. A source of the fifth transistor couples to the first node. The first current mirror couples to the fifth transistor and to the second node. A second slew boost circuit includes a sixth transistor and a second current mirror. A gate of the sixth transistor couples to the first node. A source of the sixth transistor couples to the second node. The second current mirror couples to the sixth transistor and to the first node.

AMPLIFICATION DEVICE
20190341890 · 2019-11-07 ·

An amplification device comprising: a push pull circuit which amplifies an input signal; a diamond buffer circuit to which the signal which is amplified by the push pull circuit is input; and a current mirror circuit which is connected to a power supply and the diamond buffer circuit and is connected to a retraction current terminal of the push pull circuit.

CIRCUIT FOR A MEDICAL DEVICE OR FOR ANOTHER DEVICE, MEDICAL DEVICE AND METHOD

Disclosed is a circuit (100) for a medical device, comprising: a voltage converter (110, 300) which is configured to provide at least one supply potential (HV) depending on a control signal (302, PWM) provided to the voltage converter (110, 300), a control unit (P) which is configured to provide the control signal (302, PWM) for the voltage converter (110, 300), a signal source (TCA, 400) which is powered by the at least one supply potential (+HV) and which is configured to provide an output signal at an output of the signal source (TCA, 400), wherein the signal source (TCA, 400) is configured to provide the output signal dependent on an input signal (120) at an input of the signal source (TCA, 400), wherein the control unit (P) comprises: a prediction unit (160) which is configured to predict a change in the characteristic of the output signal based on at least one of a) at least one value of the input signal and b) at least one detected value of the output signal, and an adjusting unit (160) which is configured to adjust the control signal (302, PWM) based on the predicted change in the characteristic of the output signal.

Bootstrapped application arrangement and application to the unity gain follower

An amplifier circuit includes an input amplifier; an output unity gain buffer; and a second unity gain buffer. The output unity gain buffer and the second unity gain buffer are each configured to receive a signal from an input amplifier. The output unity gain buffer is configured to provide an output voltage to an amplifier output, and the second unity gain buffer is configured to provide a bootstrap signal to the input amplifier. A unity gain amplifier includes an input unity gain amplifier; and an output unity gain buffer and a second unity gain buffer. The buffers are configured to receive a signal from an input amplifier. The output unity gain buffer is configured to provide an output voltage to an amplifier output, and the second unity gain buffer is configured to provide a bootstrap signal to the input unity gain amplifier.

Beta equalization to reduce non-linear distortions of bipolar transistor amplifiers
10250211 · 2019-04-02 · ·

Reducing non-linear distortions of an electronic device by performing at least the following: receiving, at an output stage circuit of an amplifier, an input signal from a previous stage circuit of the amplifier, driving a first subset of output transistors within the output stage circuit with an auxiliary buffer circuit to generate a first half cycle of an output signal Vout, driving a second subset of output transistors within the output stage circuit with the input signal to generate the first half cycle of the output signal Vout, and driving a set of output transistors with the input signal to generate a second half cycle of the output signal Vout, wherein the auxiliary buffer circuit equalizes the overall current gain associated with the first and second subset of output transistors with the overall current gain associated with the set of output transistors.

Power amplifier device

A power amplifier device includes a semiconductor substrate; a plurality of first transistors that are provided on the semiconductor substrate and receive input of a radio-frequency signal; a plurality of second transistors that are provided on the semiconductor substrate and electrically connected to the respective plurality of first transistors, and output a radio-frequency output signal obtained by amplifying the radio-frequency signal; a plurality of first bumps provided so as to overlay the respective plurality of first transistors; and a second bump provided away from the plurality of first bumps and provided so as not to overlay the plurality of first transistors and the plurality of second transistors. When viewed in plan from a direction perpendicular to a surface of the semiconductor substrate, a first transistor and a first bump, a second transistor, the second bump, a second transistor, and a first transistor and a first bump are arranged in sequence.

BOOTSTRAPPED APPLICATION ARRANGEMENT AND APPLICATION TO THE UNITY GAIN FOLLOWER
20190068134 · 2019-02-28 ·

An amplifier circuit includes an input amplifier; an output unity gain buffer; and a second unity gain buffer. The output unity gain buffer and the second unity gain buffer are each configured to receive a signal from an input amplifier. The output unity gain buffer is configured to provide an output voltage to an amplifier output, and the second unity gain buffer is configured to provide a bootstrap signal to the input amplifier. A unity gain amplifier includes an input unity gain amplifier; and an output unity gain buffer and a second unity gain buffer. The buffers are configured to receive a signal from an input amplifier. The output unity gain buffer is configured to provide an output voltage to an amplifier output, and the second unity gain buffer is configured to provide a bootstrap signal to the input unity gain amplifier.

Stacked SOI lateral bipolar transistor RF power amplifier and driver

An amplifier circuit including a substrate layer and a plurality of lateral bipolar junction transistors positioned entirely above the substrate. The lateral bipolar junction transistors include a plurality of monolithic emitter-collector regions coplanar to each other. Each of the emitter-collector regions is both an emitter region of a first bipolar junction transistor a collector region of a second bipolar junction transistor from the lateral bipolar junction transistors. Accordingly, the lateral bipolar junction transistors are electrically coupled in series circuit at the emitter-collector regions.