A test system can use first and different second driver stages to provide test signals to a device under test (DUT). A compound stage can receive signals from the driver stages and provide a voltage output signal to the DUT, such as via a gain circuit. The compound stage can include a buffer circuit configured to provide a first portion of the voltage output signal based on a first output signal from the first driver stage, and the compound stage can include a transimpedance circuit configured to provide a second portion of the voltage output signal based on a second output signal from the second driver stage. In an example, the gain circuit can receive a superposition signal comprising the first and second portions of the voltage output signal and, in response, provide a test signal to the DUT.

Embodiments provide an audio amplifier circuit with integrated (built-in) filter (e.g., a digital-to-analog converter (DAC) filter). The audio amplifier circuit may have a non-flat (e.g., low-pass) closed loop frequency response. The audio amplifier circuit may include a low pass filter coupled between an input terminal that receives the input analog audio signal and the input of the gain stage of the amplifier. In some embodiments, additional impedance networks may be included to produce a desired low-pass filter response, such as a second order filter, a third order filter, and/or another suitable filter response. Other embodiments may be described and/or claimed.

A logarithmic amplifier circuit includes an adaptive gain amplifier circuit and a transistor. The adaptive gain amplifier circuit includes a gain stage and a diode. The gain stage includes an input terminal, and an output terminal. The diode includes a cathode terminal coupled to the output terminal, and an anode terminal coupled to a common terminal. The transistor includes a first terminal coupled to the input terminal, a second terminal coupled to the common terminal, and a third terminal coupled to the output terminal.

An amplification device comprising: a push pull circuit which amplifies an input signal; a diamond buffer circuit to which the signal which is amplified by the push pull circuit is input; and a current mirror circuit which is connected to a power supply and the diamond buffer circuit and is connected to a retraction current terminal of the push pull circuit.

The invention relates to a signal amplifier circuit for amplifying a signal, in particular an audio amplifier circuit, includes at least one first amplifier transistor (Q1) and at least one second amplifier transistor (Q2), wherein the first amplifier transistor (Q1) and the second amplifier transistor (Q2) are connected to one another in a push-pull circuit and are fed by an amplifier voltage source (V+, V); and one or more bias diodes (D1, D2) thermally coupled in each case to an associated amplifier transistor (Q1, Q2), wherein the bias diodes (D1, D2) are arranged in a parallel connection with respect to the amplifying transistors (Q1, Q2) to reduce or avoid a crossover distortion, wherein the bias diodes (D1, D2) are fed at least partly by a voltage source (UA) which is independent of the amplifier voltage source (V+, V). The invention furthermore relates to a system and a voltage converter for providing an output-side DC voltage, including a first transformer (T1) and a second transformer (T2) connected to the first transformer (T1).

Embodiments provide an audio amplifier circuit with integrated (built-in) filter (e.g., a digital-to-analog converter (DAC) filter). The audio amplifier circuit may have a non-flat (e.g., low-pass) closed loop frequency response. The audio amplifier circuit may include a low pass filter coupled between an input terminal that receives the input analog audio signal and the input of the gain stage of the amplifier. In some embodiments, additional impedance networks may be included to produce a desired low-pass filter response, such as a second order filter, a third order filter, and/or another suitable filter response. Other embodiments may be described and/or claimed.

Digital pre-distortion may be provided. First, a radio frequency (RF) domain distortion correcting signal and a base band (BB) domain distortion correcting signal may be initialized. Then the RF domain distortion correcting signal may be generated from an input signal. The generated RF domain distortion correcting signal may correspond to an amplifier. Next, the BB domain distortion correcting signal may be generated from the input signal. The generated BB domain distortion correcting signal may correspond to the amplifier. Then the RF domain distortion correcting signal and the BB domain distortion correcting signal may be combined to form a hybrid distortion correcting signal. The hybrid distortion correcting signal may then be provided to input matching circuitry feeding the amplifier.

An amplification device comprising: a push pull circuit which amplifies an input signal; a diamond buffer circuit to which the signal which is amplified by the push pull circuit is input; and a current mirror circuit which is connected to a power supply and the diamond buffer circuit and is connected to a retraction current terminal of the push pull circuit.

Digital pre-distortion may be provided. First, a radio frequency (RF) domain distortion correcting signal and a base band (BB) domain distortion correcting signal may be initialized. Then the RF domain distortion correcting signal may be generated from an input signal. The generated RF domain distortion correcting signal may correspond to an amplifier. Next, the BB domain distortion correcting signal may be generated from the input signal. The generated BB domain distortion correcting signal may correspond to the amplifier. Then the RF domain distortion correcting signal and the BB domain distortion correcting signal may be combined to form a hybrid distortion correcting signal. The hybrid distortion correcting signal may then be provided to input matching circuitry feeding the amplifier.

A line receiver comprising a switched capacitor circuit and a buffer is described. The buffer may be configured to receive, through the switched capacitor circuit, an analog signal. In response, the buffer may provide an output signal to a load, such as an analog-to-digital converter. The switched capacitor circuit may be controlled by a control circuitry, and may charge at least one capacitive element to a desired reference voltage. The reference voltage may be selected so as to bias the buffer with a desired DC current, and consequently, to provide a desired degree if linearity. The line receiver may further comprise a bias circuit configured to generate the reference voltage needed to bias the buffer with the desired DC current.