According to an aspect of the invention, an electronic lock is conceived, being adapted to harvest energy from a radio frequency (RF) connection established between a mobile device and said electronic lock, further being adapted to use the harvested energy for processing an authorization token received via said RF connection from the mobile device, and further being adapted to use the harvested energy for controlling an unlocking switch in dependence on a result of said processing.

A receiving circuit includes a first input terminal and a second input terminal, an input circuit that includes a first node, a second node, a first inductor, a second inductor, a first variable resistive element, and a second variable resistive element. The first variable resistive element is electrically connected between the first node and the second input terminal, and the second variable resistive element is electrically connected between the second node and the first input terminal. The receiving circuit further includes a differential amplifier configured to generate a differential voltage signal in accordance with a differential current signal. The receiving circuit still further includes a control circuit configured to perform detection of an amplitude of the differential voltage signal and change a resistance value of the first variable resistive element and a resistance value of the second variable resistive element based on a result of the detection.

An amplifier circuit with a differential input and a differential output comprises a first and a second pair of matched transistors having a first threshold voltage and comprising control terminals connected to the differential input. A first and a second pair of triplets of transistors having a second threshold voltage being different from the first threshold voltage is connected to each one of the pairs of matched transistors such that respective current paths are formed with these transistors. The currents are split up to bias current sources and to an output stage such that the current is reused for implementing a class AB operation. Furthermore, a current through bias transistors connected in the current path of the first and the second pair of matched transistors is mirrored to output transistors being arranged in a differential current path of the output stage.

A receiving circuit includes a first input terminal and a second input terminal, an input circuit that includes a first node, a second node, a first inductor, a second inductor, a first variable resistive element, and a second variable resistive element. The first variable resistive element is electrically connected between the first node and the second input terminal, and the second variable resistive element is electrically connected between the second node and the first input terminal. The receiving circuit further includes a differential amplifier configured to generate a differential voltage signal in accordance with a differential current signal. The receiving circuit still further includes a control circuit configured to perform detection of an amplitude of the differential voltage signal and change a resistance value of the first variable resistive element and a resistance value of the second variable resistive element based on a result of the detection.

A differential amplifier includes a positive leg, a negative leg, and biasing circuitry. The positive leg includes at least one positive leg transistor, a first positive leg degeneration capacitor, and positive leg degeneration capacitor biasing circuitry configured to bias the first degeneration capacitor during a reset period. The negative leg includes at least one negative leg transistor, a negative leg degeneration capacitor, and negative leg degeneration capacitor biasing circuitry configured to bias the negative leg degeneration capacitor during the reset period. The biasing circuitry biases current of both the at least one positive leg transistor and the at least one negative leg transistor based on capacitance of the first positive leg degeneration capacitor, capacitance of the first negative leg degeneration capacitor, and a sampling time during an amplification period. The differential amplifier may be a stage amplifier in an Analog to Digital Converter (ADC).

A tunable matching circuit for use with ultra-low power RF receivers is described to support a variety of RF communication bands. A switched-capacitor array and a switched-resistor array are used to adjust the input impedance presented by the operating characteristics of transistors in an ultra-low-power mode. An RF sensor may be used to monitor performance of the tunable matching circuit and thereby determine optimal setting of the digital control word that drives the switched-capacitor array and switched-resistor array. An effective match over a significant bandwidth is achievable. The optimal matching configuration may be updated at any time to adjust to changing operating conditions. Memory may be used to store the optimal matching configurations of the switched capacitor array and switched resistor array.

A radio circuit, comprises an antenna; a differential power amplifier, comprising differential transmit inputs and differential transmit outputs, configured to amplify differential transmit signals received via the differential transmit inputs and output the amplified differential transmit signals via the differential transmit outputs; a differential low noise amplifier, comprising differential receive inputs and differential receive outputs, configured to receive differential receive signals via the differential receive inputs and output amplified differential receive signals via the differential receive outputs; and a transformer comprising a primary winding and a secondary winding, the primary winding coupled with the differential transmit outputs of the power amplifier and the differential receive inputs of the low noise amplifier and the secondary winding coupled with the antenna.

A low dropout regulator includes a PMOS power transistor, a feedback network, an error amplifier and an active enhanced PSRR unit. The PMOS power transistor has a first end coupled to an input voltage, and a second end coupled to a load and the feedback network. The error amplifier receives a feedback signal generated from the feedback network, compares the feedback signal with a reference voltage to generate a difference value, and amplifies the difference value to generate an error signal. The active enhanced PSRR unit has one end coupled to the first end, and another end coupled to a control end of the PMOS power transistor and the error amplifier, detects an input voltage of the first end, and correspondingly adjusts a voltage of the control end to stabilize a voltage between the control end and the first end according to a variation of the input voltage.

A transmit circuit for sending and/or receiving at least one single-ended signal and for sending a differential signal on two transmission lines, including: a differential amplifier for sending signal parts of a differential signal via the two transmission lines, two impedance matching resistances that are situated between the transmission lines, connected in series, for the impedance matching of the differential amplifier; a switch that is connected in series between the impedance matching resistances; at least one single-ended transmit amplifier for sending or receiving a single-ended signal via an associated one of the transmission lines, each of the at least one single-ended transmit amplifiers being connected to a terminal of the switch that is connected, via the corresponding impedance matching resistance to the associated transmission line.

An apparatus, system, and method are disclosed for compensating input offset of an amplifier having first and second amplifier output nodes. The method comprises generating a proportional-to-absolute temperature (PTAT) current, generating a complementary-to-absolute temperature (CTAT) current, and selecting, based on the input offset, one of the first and second amplifier output nodes into which a compensation current is to be coupled. The compensation current is based on a selected one of the PTAT current and CTAT current.