An amplifier circuit for compensating an output signal provided at an output of the amplifier circuit comprises a cascade of sub-amplifiers. Each sub-amplifier of the cascade contributes to a respective part of the output signal. The cascade of sub-amplifiers comprises an end sub-amplifier and at least one preliminary sub-amplifier. At least one error correction block is coupled to apply feedforward error correction to an output of one of the at least one preliminary sub-amplifier.

The present invention addresses method, apparatus and computer program product for stabilization of the direct learning algorithm for wideband signals. Thereby, a signal to be amplified is input to a pre-distorter provided for compensating for non-linearity of the power amplifier, and the pre-distorted output signal from the pre-distorter is forwarded to the power amplifier. Parameters of the pre-distorter are adapted based on an error between the linearized signal output from the power amplifier and the signal to be amplified using an adaptive direct learning algorithm, and the linear system of equations formed by the direct learning algorithm are solved using a conjugate gradient algorithm, wherein, once per direct learning algorithm adaptation, at least one of the initial residual and the initial direction of the conjugate gradient algorithm are set based on the result of the previous adaptation.

A power amplifier module includes a driver transistor having first, second, and third terminals, a radio-frequency input port coupled to the first terminal of the driver transistor, a cascode transistor having first, second, and third terminals, the second terminal of the cascode transistor being coupled to the third terminal of the driver transistor, a radio-frequency output port coupled to the second terminal of the cascode transistor, and a coupling path connecting the first terminal of the cascode transistor to the third terminal of the cascode transistor, the coupling path including a capacitor.

A Digital Power-Amplifier (DPA) system includes a power amplifier (PA) circuit having control inputs and an output for generating output signals, and an adaptive control circuit that comprises an input interface, an output interface, a memory storing an adaptive control algorithm and a processor performing instructions based on the adaptive control algorithm in connection with the memory, wherein the input interface receives input-state signals and output signals of the DPA circuit, wherein the adaptive control algorithm determines, in response to the input-state signals and the output signals, control parameters of control signals transmitted to the control inputs from the output interface for controlling operations of the DPA circuit.

A power amplification system comprises a pre-processor including a wavefront multiplexer, a set of power amplifiers, and a post-processor including a wavefront demultiplexer. The wavefront multiplexer receives concurrently N input signals, N being an integer greater than 2, performs a wavefront multiplexing transform on the N input signals by attaching N wavefronts to the N input signals respectively, and generates N first output signals. The N wavefronts are unique and mutually orthogonal. The wavefront multiplexing transform has an inverse. The N power amplifiers amplify the N first output signals and generate N amplified signals. The wavefront demultiplexer performs the inverse of the wavefront multiplexing transform on the N amplified signals and generates N second output signals, the N second output signals corresponding respectively to the N input signals. Each of the N second output signals is an amplified version of a corresponding one of the N input signals.

Methods and systems for modulating an amplifier power supply to efficiently attain amplified RF output power with much lower power dissipation than existing amplifiers. In a cable television (CATV) network, a processor receives a signal to be amplified by an amplifier at a location remote from the processor. A bias point of the amplifier may be variably modulated based on peaks of an input signal to reduce amplifier dissipation.

Maximum likelihood bit-stream generation and detection techniques are provided using the M-algorithm and Infinite Impulse Response (IIR) filtering. The M-Algorithm is applied to a target input signal X to perform Maximum Likelihood Sequence Estimation on the target input signal X to produce a digital bit stream B, such that after filtering by an IIR filter, the produced digital stream Y produces an error signal satisfying one or more predefined requirements. The predefined requirements comprise, for example, a substantially minimum error. In an exemplary bit detection implementation, the target input signal X comprises an observed analog signal and the produced digital stream Y comprises a digitized output of a receive channel corresponding to a transmitted bit stream. In an exemplary bit stream generation implementation, the target input signal X comprises a desired transmit signal and the produced digital stream Y comprises an estimate of the desired transmit signal.

The present invention addresses method, apparatus and computer program product for stabilization of the direct learning algorithm for wideband signals. Thereby, a signal to be amplified is input to a pre-distorter provided for compensating for non-linearity of the power amplifier, and the pre-distorted output signal from the pre-distorter is forwarded to the power amplifier. Parameters of the pre-distorter are adapted based on an error between the linearized signal output from the power amplifier and the signal to be amplified using an adaptive direct learning algorithm, and the linear system of equations formed by the direct learning algorithm are solved using a conjugate gradient algorithm, wherein, once per direct learning algorithm adaptation, at least one of the initial residual and the initial direction of the conjugate gradient algorithm are set based on the result of the previous adaptation.

System-on-chip (SOC) products using high frequency, wideband, highly linear, CMOS and BiCMOS processes will be the next evolution of wireless and wireline communications integrated circuits. Aspects described herein can provide enhanced overall performance over existing prior art single-ended, wideband RF amplifier topologies. A single-ended third order intermodulation distortion nulling circuit can extend the dynamic range for wideband amplifiers up to an order-of-magnitude, without a DC power or noise figure (NF) penalty. The application of distortion nulling can be extended to all the building blocks used in CMOS/BiCMOS RF transceivers to improve performance. The application of this concept to all of the building blocks in an RF transceiver will allow the dynamic range of the transceiver to be increased without suffering a DC power dissipation increase or a significant noise increase.

A broadband linear processing system includes a pre-processing module and a set of M linear processors coupled to the pre-processing module, M being an integer greater than 1. The pre-processing module includes a wavefront multiplexer having M input ports and M output ports. The wavefront multiplexer receives M input signals at the M input ports, performs a wavefront multiplexing transform on the M input signals and outputs M narrowband signal streams at the M output ports. The wavefront multiplexing transform has an inverse. Each of the M linear processors receives and processes a corresponding one of the M narrowband signal streams, and outputs a corresponding one of M processed narrowband signal streams.