Patent classifications
H03F2201/3215
Adaptive envelope tracking threshold
An apparatus of a transmitter and method are provided, the apparatus comprising a processor that calculates a supply voltage (SV) value (SVV) to provide as an SV for a power amplifier (PA) of the transmitter for transmissions during a transmission time slot (TS). When the SV<an envelope tracking (ET) threshold (ETT), then the processor configures the PA to transmit a signal in an average power tracking (APT) mode that maintains the SV at the SVV during the TS. When the SVETT, and an APT condition is met, then the processor configures the PA to transmit the signal in the APT mode. When the SVETT, and the APT condition is not met, then the processor transmits by an adjustment to the SVV to track an amplitude modulation envelope during the TS in an ET mode.
ADAPTIVE ENVELOPE TRACKING THRESHOLD
An apparatus of a transmitter and method are provided, the apparatus comprising a processor that calculates a supply voltage (SV) value (SVV) to provide as an SV for a power amplifier (PA) of the transmitter for transmissions during a transmission time slot (TS). When the SV<an envelope tracking (ET) threshold (ETT), then the processor configures the PA to transmit a signal in an average power tracking (APT) mode that maintains the SV at the SVV during the TS. When the SVETT, and an APT condition is met, then the processor configures the PA to transmit the signal in the APT mode. When the SVETT, and the APT condition is not met, then the processor transmits by an adjustment to the SVV to track an amplitude modulation envelope during the TS in an ET mode.
Reduction of second-order non-linear distortion in a wideband communication system
A system has a plurality of non-linear circuit stages and an intervening linear circuit stage. An input signal is provided to a first non-linear circuit stage, and from the first non-linear circuit stage, to the linear circuit stage. The first non-linear circuit stage applies a second-order distortion to the input signal and provides the resulting signal to the linear circuit stage. The resulting signal that is output from the linear circuit stage is inverted with respect to the input signal and suitably linearly processed (attenuated or amplified). This signal is then provided to a second non-linear circuit that applies a second-order distortion and outputs a signal that has an overall reduction in second-order distortion.
Power amplifier module
A power amplifier module includes a combining circuit including a combiner. The combining circuit further includes a first inductor connected in series between an output terminal of a first amplifier and the combiner, a second inductor connected in series between an output terminal of a second amplifier and the combiner, and a second capacitor having an end connected to the combiner and another end grounded. A phase of a third signal from the output terminal of the first amplifier to the second amplifier through the combiner is delayed by about 45 degrees in the first inductor and the second capacitor, and is delayed by about 45 degrees in the second inductor and the second capacitor. A phase of the third signal from the output terminal of the first amplifier to the second amplifier through the first capacitor is advanced by about 90 degrees.
POWER AMPLIFIER CIRCUIT AND ANTENNA DEVICE
A power amplifier circuit includes a plurality of amplifiers, a detector configured to detect distortion characteristics of each of the plurality of amplifiers, a control circuit configured to control a bias voltage to be applied to at least one amplifier of the plurality of amplifiers so that the distortion characteristics of each of the plurality of amplifiers detected by the detector are matched, and a distortion compensator configured to perform distortion compensation for the plurality of amplifiers, based on the distortion characteristics of each of the plurality of amplifiers detected by the detector.
Fiber-optic node with forward data content driven power consumption
Methods and systems for modulating an amplifier power supply to efficiently attain amplified RF output power with much lower power dissipation than existing amplifiers. In a cable television (CATV) network, a processor receives a signal to be amplified by an amplifier at a location remote from the processor. A bias point of the amplifier may be variably modulated based on peaks of an input signal to reduce amplifier dissipation.
Amplification systems and methods with distortion reductions
System and method for integrating an input signal to generate an output signal. The system includes a first integrator configured to receive the input signal and generate an integrated signal based on at least information associated with the input signal, a second integrator configured to receive the integrated signal and generate the output signal based on at least information associated with the integrated signal, and a compensation capacitor coupled to the first integrator and the second integrator. The first integrator includes a first integration capacitor and a first operational amplifier including a first input terminal and a first output terminal, the first integration capacitor being coupled between the first input terminal and the first output terminal. The second integrator includes a second integration capacitor and a second operational amplifier including a second input terminal and a second output terminal.
Switching circuit, corresponding device and method
A switching circuit includes a switching circuit stage configured to supply a load via filter networks. Control circuitry is provided to control alternate switching sequences of transistors in the half-bridges of the switching circuit stage. A current flow line is provided between the output nodes of the half-bridges including an inductance between two switches. First and second capacitances are coupled with the output nodes of the half-bridges. The control circuitry switches first and second switches to the conductive state at intervals in the alternate switching sequences of the transistors in the half-bridges between switching the first pair of transistors to a non-conductive state and switching the second pair of transistors to a conductive state.
Digital dynamic bias circuit
Circuits and methods for reducing the cost and/or power consumption of a user terminal and/or the gateway of a telecommunications system (550) that may include a telecommunications satellite. Embodiments generate a dynamic input bias signal based upon an information signal envelope (which may be pre-distorted) which is applied to the signal input of a power amplifier (PA), thus reducing average power consumption. Other embodiments further include dynamic linearization (518) of the information signal, and/or variation of the supply voltage to the power amplifier (PA) as a function of the envelope of the information signal. Another aspect is a multi-stage chained feedback regulated voltage supply circuit for providing two or more output voltages that may be used as alternative supply voltages to a power amplifier (PA).
AMPLIFIER
There has been a problem that linearity is degraded in the conventional amplifier when the idle current is reduced in order to lower the power consumption.
An amplifier of the present invention includes: a bias circuit to cause a bias current to flow; an amplifying element to amplify a signal by causing an output current corresponding to the bias current to flow; a bias current subtracting circuit to detect the signal and subtract, from the bias current, a current based on an amplitude of the signal detected; and a bias current adding circuit having an operation starting point higher than an operation starting point of the bias current subtracting circuit, and to detect the signal and add, to the bias current, a current based on an amplitude of the signal detected.