A device configured to perform wireless communication includes: a pre-distortion circuit configured to generate a pre-distorted input signal by performing pre-distortion on an input signal based on a parameter set comprising a plurality of coefficients; a power amplifier configured to generate an output signal by amplifying an RF signal based on the pre-distorted input signal; and a parameter obtaining circuit configured to obtain second memory polynomial modeling information corresponding to an operating frequency band based on first memory polynomial modeling information corresponding to each of a plurality of frequency sections and obtain a parameter set according to an indirect learning structure by using the second memory polynomial modeling information.

An embodiment of the invention is a time-delay invariant predistortion approach to linearize power amplifiers in wireless RF transmitters. The predistortion architecture is based on the stored-compensation or memory-compensation principle by using a combined time-delay addressing method, and therefore, the architecture has an intrinsic, self-calibrating time-delay compensation function. The predistortion architecture only uses a lookup table to conduct both the correction of non-linear responses of a power amplifier and the compensation of any time-delay effects presented in the same system. Due to the time-delay invariant characteristic, the predistortion design has a wider dynamic range processing advantage for wireless RF signals, and therefore can be implemented in multi-carrier and multi-channel wireless systems.

Systems and methods are disclosed herein for providing efficient Digital Predistortion (DPD). In some embodiments, a system comprises a DPD system comprising a DPD actuator. The DPD actuator comprises a Look-Up Table (LUT), selection circuitry, and an approximate multiplication function. Each LUT entry comprises information that represents a first set of values {p.sub.1, p.sub.2, . . . , p.sub.k} and a second set of values {s.sub.1, s.sub.2, . . . , s.sub.k} that represent a LUT value of s.sub.1.Math.2.sup.p.sup.1+s.sub.2.Math.2.sup.p.sup.2+ . . . +s.sub.k.Math.2.sup.p.sup.k where each value s.sub.i∈{+1,−1} where k≥2. The selection circuitry is operable to, for each input sample of an input signal, select a LUT entry based on a value derived from the input sample that is indicative of a power of the input signal. The approximate multiplication function comprises shifting and combining circuitry that operates to, for each input sample, shift and combine bits that form a binary representation of the input sample in accordance with {p.sub.1, p.sub.2, . . . , p.sub.k} and {s.sub.1, s.sub.2, . . . , s.sub.k} to provide an output sample.

The present disclosure is a novel utility of a software defined radio (SDR) based Distributed Antenna System (DAS) that is field reconfigurable and support multi-modulation schemes (modulation-independent), multi-carriers, multi-frequency bands and multi-channels. The present invention enables a high degree of flexibility to manage, control, enhance, facilitate the usage and performance of a distributed wireless network such as Flexible Simulcast, automatic traffic load-balancing, network and radio resource optimization, network calibration, autonomous/assisted commissioning, carrier pooling, automatic frequency selection, frequency carrier placement, traffic monitoring, traffic tagging, pilot beacon, etc. As a result, a DAS in accordance with the present invention can increase the efficiency and traffic capacity of the operators' wireless network.

A distortion compensation device includes: a first distortion compensation circuit having a first distortion compensation characteristic for compensating for a first distortion occurring in an output of an amplifier, the first distortion compensation circuit being configured to compensate for the first distortion; a second distortion compensation circuit having a second distortion compensation characteristic for compensating for a second distortion occurring in the output of the amplifier, the second distortion compensation circuit being configured to compensate for the second distortion; and an update unit configured to update the second distortion compensation characteristic. The first distortion includes a non-linear distortion and a memory effect distortion, the second distortion is a distortion whose temporal change is quicker than the first distortion, and the update unit updates the second distortion compensation characteristic at a higher frequency than an update frequency of the first distortion compensation characteristic.

A power amplifier system includes an input operable to receive an original value that reflects information to be communicated and an address data former operable to generate a digital lookup table key. The power amplifier system also includes a predistortion lookup table coupled to the address data former and a power amplifier having an output and coupled to the predistortion lookup table. The power amplifier system further includes a feedback loop providing a signal associated with the output of the power amplifier to the predistortion lookup table and a switch disposed in the feedback loop and operable to disconnect the predistortion lookup table from the output of the power amplifier.

Systems comprising a low power Digital Predistortion (DPD) system and methods of operation thereof are disclosed herein. In some embodiments, a system comprises a DPD system for digitally predistorting an input signal to provide an output signal. The DPD system comprises a DPD actuator comprising one or more configurable multiplication functions, each configurable to operate in different power modes. The different power modes comprise a first power mode in which the configurable multiplication function multiplies a first value related to an input sample of the input signal and a second value related to a respective DPD value to provide an output value and a second power mode in which the configurable multiplication function outputs, as the output value, are an approximation of a multiplication of the first value and the second value.

Disclosed is a system and a method of baseband linearization for a class G radiofrequency power amplifier, the linearization system including a module for selecting the amplifier power supply voltage, a digital predistortion module, and a module for extracting predistortion coefficients, wherein the linearization system also includes a digital filter with complex coefficients, the input of which is connected to the output of the digital predistortion module, and a module for extracting filter coefficients which is designed to extract filter coefficients used by the digital filter with complex coefficients.

A method of reducing memory effect of a power amplifier (PA), for a look-up table (LUT) based memory digital pre-distortion (DPD) circuit of an electronic device is disclosed. The method comprises generating a pre-distorted signal according to a LUT including parameters of an input signal amplitude and an input signal delay associated with a bandwidth of a signal inputted to the memory DPD circuit, and outputting the pre-distorted signal to the PA for improving the nonlinearity of the PA.

A power amplifier circuit includes a plurality of amplifiers, a detector configured to detect distortion characteristics of each of the plurality of amplifiers, a control circuit configured to control a bias voltage to be applied to at least one amplifier of the plurality of amplifiers so that the distortion characteristics of each of the plurality of amplifiers detected by the detector are matched, and a distortion compensator configured to perform distortion compensation for the plurality of amplifiers, based on the distortion characteristics of each of the plurality of amplifiers detected by the detector.