H03F2203/30061

Transadmittance amplifier

Embodiments describe a transadmittance amplifier comprising an inverting output port and a non-inverting output port. The transadmittance amplifier comprising a first differential transistor pair having a first transistor comprising an inverting input port. The first transistor is configured to provide an output current to the inverting output port. A second transistor comprising a non-inverting input port. The second transistor is configured to provide an output current to the non-inverting output port. A second differential transistor pair having a third transistor comprising an inverting input port and a fourth transistor comprising a non-inverting input port. A first current source and a second current source. The transadmittance amplifier comprises a first current mirror which is configured to mirror an output current of the fourth transistor to the inverting output port and a second current mirror which is configured to mirror an output current of the third transistor to the non-inverting output port.

TRANSADMITTANCE AMPLIFIER
20190081600 · 2019-03-14 ·

Embodiments describe a transadmittance amplifier comprising an inverting output port and a non-inverting output port. The transadmittance amplifier comprising a first differential transistor pair having a first transistor comprising an inverting input port. The first transistor is configured to provide an output current to the inverting output port. A second transistor comprising a non-inverting input port. The second transistor is configured to provide an output current to the non-inverting output port. A second differential transistor pair having a third transistor comprising an inverting input port and a fourth transistor comprising a non-inverting input port. A first current source and a second current source. The transadmittance amplifier comprises a first current mirror which is configured to mirror an output current of the fourth transistor to the inverting output port and a second current mirror which is configured to mirror an output current of the third transistor to the non-inverting output port.

Class AB monticelli output stage design with bias temperature instability tolerance

In an example, a system includes an amplifier having an output stage configured to provide an output voltage, where the output stage includes a p-channel transistor and an n-channel transistor. The system includes a sense transistor having a gate coupled to a gate of the p-channel transistor, where the sense transistor is configured to sense a current of the p-channel transistor and produce a sense current. The system includes a current mirror coupled to the sense transistor and configured to provide the sense current to a gate of a control transistor, the control transistor having a source coupled to the gate of the p-channel transistor. The system includes a reference current source coupled to the control transistor and configured to provide a reference current. The control transistor is configured to adjust a gate current provided to the p-channel transistor based on comparing the sense current to the reference current.