H03F2203/30117

BIAS TECHNIQUES FOR AMPLIFIERS WITH MIXED POLARITY TRANSISTOR STACKS
20220182017 · 2022-06-09 ·

Various methods and circuital arrangements for biasing gates of stacked transistor amplifier that includes two series connected transistor stacks of different polarities are presented, where the amplifier is configured to operate according to different modes of operation. Such circuital arrangements operate in a closed loop with a feedback error voltage that is based on a sensed voltage at a common node of the two series connected transistor stacks. According to one aspect, gate biasing voltages to input transistors of each of the two series connected stacks are adjusted by respective current mirrors that are controlled based on the feedback error voltage. According to another aspect, other gate biasing voltages are generated by maintaining a fixed gate biasing voltage between any two consecutive gate basing voltages.

DRIVING AMPLIFIER STAGE WITH LOW OUTPUT IMPEDANCE
20230246611 · 2023-08-03 ·

A driving amplifier with low output impedance is disclosed. In one aspect, a driving amplifier stage that does not need an inter-stage impedance matching network between the driving amplifier stage and an output amplifier stage in a transmission chain may be achieved by providing stacking transconductance devices within the driving amplifier stage and reusing a supply current to provide an intermediate signal with high current but moderated voltage swing to drive the output amplifier stage, in specifically contemplated aspects, the stacked transconductance devices may be complementary metal oxide semiconductor (CMOS) field effect transistors (FETs).

POWER AMPLIFIER USING MULTI-PATH COMMON-MODE FEEDBACK LOOP
20230246610 · 2023-08-03 ·

A power amplifier using multi-path common-mode feedback loops for radio frequency linearization is disclosed. In one aspect, a complementary metal oxide semiconductor (CMOS) power amplifier containing cascoded n-type field effect transistors (NFETs) and cascoded p-type FETs (PFETs) may have a common-mode feedback network and provides bias voltages that are dynamically varying with the signal power to keep the output common-mode fixed around a half-supply level, while the small-signal and large-signal transconductances of the FET's are kept balanced. A further feedback network may be associated with the supply voltage to assist in providing a symmetrical supply signal. The symmetrical supply signal allows for supply variations without introducing distortion for the power amplifier stage.

High voltage output stage

An amplifier circuit includes a high-voltage output stage. The high-voltage output stage includes an output terminal, a high-side output circuit, a low-side output circuit, and a feedback circuit. The high-side output circuit sources current to the output terminal, and includes a high-side input transistor, a first high-side cascode transistor coupled to the high-side input transistor, and a second high-side cascode transistor coupled to the first high-side cascode transistor and the output terminal. The low-side output circuit sinks current from the output terminal, and includes a low-side input transistor, a first low-side cascode transistor coupled to the low-side input transistor, and a second low-side cascode transistor coupled to the first low-side cascode transistor and the output terminal. The feedback circuit is configured to bias the second high-side cascode transistor and the second low-side cascode transistor based on a sense voltage generated by the high-side output circuit or the low-side output circuit.

POWER AMPLIFIER DEVICE

A power amplifier device includes a semiconductor substrate; a plurality of first transistors that are provided on the semiconductor substrate and receive input of a radio-frequency signal; a plurality of second transistors that are provided on the semiconductor substrate and electrically connected to the respective plurality of first transistors, and output a radio-frequency output signal obtained by amplifying the radio-frequency signal; a plurality of first bumps provided so as to overlay the respective plurality of first transistors; and a second bump provided away from the plurality of first bumps and provided so as not to overlay the plurality of first transistors and the plurality of second transistors. When viewed in plan from a direction perpendicular to a surface of the semiconductor substrate, a first transistor and a first bump, a second transistor, the second bump, a second transistor, and a first transistor and a first bump are arranged in sequence.

RECONFIGURABLE AMPLIFIER

An amplifying circuit includes a first reconfigurable amplifier configured to selectively operate in a cascode mode or a non-cascode mode, wherein an input of the first reconfigurable amplifier is coupled to a first input of the amplifying circuit, and an output of the first reconfigurable amplifier is coupled to an output of the amplifying circuit. The amplifying circuit also includes a second reconfigurable amplifier configured to selectively operate in the cascode mode or the non-cascode mode, wherein an input of the second reconfigurable amplifier is coupled to a second input of the amplifying circuit, and an output of the second reconfigurable amplifier is coupled to the output of the amplifying circuit.

CIRCUIT HAVING AN AMPLIFIER STAGE AND A CURRENT MIRROR LOOP OR STABILITY NETWORK
20230361737 · 2023-11-09 ·

A circuit an amplifier stage that amplifier stage includes a positive amplifier branch and a negative amplifier branch and has current flow paths therethrough cascaded in a flow line for a core current for the amplifier stage between a supply node and a ground node. The positive and negative amplifier branches have respective input nodes configured to receive an input signal applied therebetween. A current mirror loop can be coupled to the respective input nodes of the positive and negative amplifier branches and provides an adjustable high-impedance bias source for the core current for the amplifier stage. In addition to, or instead of the current mirror loop, the circuit can include stability network having a gain bandwidth range. The amplifier stage is configured to short-circuit the output signal from the amplifier stage within the gain bandwidth range based on an output voltage setting signal.

HEADPHONE DRIVER AND DRIVING METHOD THEREOF
20220272444 · 2022-08-25 · ·

A headphone driver is used to drive a headphone apparatus, which includes a first differential driver, a first positive output terminal, a first negative output terminal, and a second negative output terminal. The first positive output terminal is connected to the first terminal. A switch unit is disposed on a feedback path at the first negative output terminal and the second negative output terminal, to enable the first/second negative output terminal in feedback as a close loop to output to the third/fourth terminal and disable the second/first negative output terminal at a first/second operation state. The first differential driver includes a first positive voltage driving circuit, a first negative voltage driving circuit, and a second negative voltage driving circuit, respectively providing the first positive output terminal, the first negative output terminal, and the second negative output terminal.

Headphone driver and driving method thereof
11457307 · 2022-09-27 · ·

A headphone driver is used to drive a headphone apparatus, which includes a first differential driver, a first positive output terminal, a first negative output terminal, and a second negative output terminal. The first positive output terminal is connected to the first terminal. A switch unit is disposed on a feedback path at the first negative output terminal and the second negative output terminal, to enable the first/second negative output terminal in feedback as a close loop to output to the third/fourth terminal and disable the second/first negative output terminal at a first/second operation state. The first differential driver includes a first positive voltage driving circuit, a first negative voltage driving circuit, and a second negative voltage driving circuit, respectively providing the first positive output terminal, the first negative output terminal, and the second negative output terminal.

Apparatus for radio-frequency amplifier with improved performance and associated methods

An apparatus includes a radio-frequency (RF) circuit, which includes a power amplifier coupled to receive an RF input signal and to provide an RF output signal in response to a modified bias signal. The RF circuit further includes a bias path circuit coupled to modify a bias signal as a function of a characteristic of an input signal to generate the modified bias signal. The bias path circuit provides the modified bias signal to the power amplifier.