A differential amplifier is provided, in which generation of unnecessary harmonic distortion in the differential output signal is suppressed. A common mode feedback circuit increases or decreases operating points of an inverting output terminal and a non-inverting output terminal such that an intermediate voltage of voltages respectively provided to an inverting input terminal and a non-inverting input terminal is consistent with to a reference voltage. Variations in voltage at the inverting input terminal and the non-inverting input terminal are suppressed, variations in electrical properties of elements connected to the input terminals are suppressed. Therefore, it is possible to suppress generation of harmonic distortion in the output signals from the inverting output terminal and the non-inverting output terminal.

A reference voltage generation circuit may include: a first reference current path formed through a first node and a first transistor; a second reference current path formed through a second node and a second transistor; a first feedback loop configured to feed a first current back to the first and second reference current paths such that voltage levels of the first and second nodes are kept the same; and a second feedback loop configured to control the currents flowing through the first and second transistors according to a second current.

Techniques for monitoring a distortion signal of a power amplifier circuit, where the output of a distortion monitoring circuit includes little or no fundamental signal and closely represents the actual distortion of the amplifier circuit of a wired communications system. The power amplifier circuit can generate a distortion feedback signal that does not affect the power amplifier's output power capability, e.g., no inherent loss in the fundamental output of the amplifier. That is, using a distortion monitor circuit, the power amplifier circuit can resolve a distortion feedback signal from the intended output signal of the output power amplifier circuit.

Aspects of the disclosure provide for a method. In at least some examples, the method includes receiving, at a circuit, data via a differential input signal. The method further includes detecting a falling edge in the data received via the differential input signal. The method further includes holding an output of the circuit at a final logical value of the data. The method further includes disabling a transmitter of the circuit while holding the output of the circuit at the final logical value of the data. The method further includes releasing the output of the circuit from the final logical value of the data.

An automatic gain control circuit includes a linear-to-log conversion circuit, a current amplifier circuit, and an amplitude sense circuit. The current amplifier circuit includes a current input terminal coupled to an output terminal of the linear-to-log conversion circuit. The amplitude sense circuit includes an input terminal coupled to an output terminal of the current amplifier circuit, and an output terminal coupled to a gain control input terminal of the current amplifier circuit.

In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.

An apparatus measures a speaker impedance. A DAC converts a known digital input signal to an audio frequency first analog voltage signal. Resistors with known resistance attenuate the first analog voltage signal to generate a current. The known resistance effectively determines the current because the known resistance is high relative to the speaker impedance. The current is sourced into the speaker to generate a second analog voltage signal. The known resistance is sufficiently high to cause the second analog voltage signal to be inaudible as transduced by the speaker. An amplifier amplifies the second analog voltage signal with a known gain to generate a third analog voltage signal. An ADC converts the third analog voltage signal to a digital output signal. A processing element calculates the impedance of the speaker proportional to the digital output signal based on the known digital input signal, the known resistance, and the known gain.

A receiver circuit with input common mode voltage sensing is provided. The receiver circuit is applied to a controller area network and comprises a resistor assembly, connected with a high end and a low end of the controller area network, a common mode voltage sensor and a receiving amplifier. The resistor assembly bucks voltage, respectively generating the high end and low end voltage divisions at first and second nodes and outputting the voltage divisions to the receiving amplifier to generate a resultant signal to an output end of the controller area network. The common mode voltage sensor is connected between the resistor assembly and the receiving amplifier, and able to sense the common mode voltage on bus and control the voltage on center tap of the resistor assembly so the receiver circuit for controller area network can receive the differential signal with a much wider input common mode range.

An amplifier circuit has: a first amplifier circuit, including a chopper circuit amplifying a first differential signal input between first and second input terminals to output a second differential signal; and a second amplifier circuit amplifying the second differential signal to output a single-ended signal. The second amplifier circuit includes: a first circuit including first and second transistors, the first circuit being connected to the first amplifier circuit so that the second differential signal input into gates of these transistors, the first circuit converting the second differential signal to a current flowing into a first node connected to the first transistor and a current flowing into a second node connected to the second transistor; and a second circuit negatively feeding back a voltage at the second node so that the difference in voltage between these nodes is reduced. The second amplifier circuit outputs the single-ended signal from the second node.

The present invention provides a circuit including a reference voltage generator and a plurality of receivers, wherein the reference voltage generator is configured to generate a reference voltage, and each of the receivers is configured to receive the reference voltage and a corresponding input signal to generate a corresponding output signal. In addition, for at least a specific receiver of the plurality of receivers, the specific receiver comprises at least one amplifying stage, the amplifying stage comprises a first input terminal configured to receive the corresponding input signal, a second input terminal configured to receive the reference voltage, a first output terminal configured to generate a first signal, and a second output terminal configured to generate a second signal; and the specific receiver further comprises a first feedback circuit coupled between the first output terminal and the second input terminal.