An input/output circuit may include an input circuit, an amplifier circuit and a precharging circuit. The input circuit may load differential input data to setup nodes based on a data strobe clock. The amplifier circuit may compare and amplify the data that is loaded to the setup nodes and configured to output the amplified data. The precharging circuit may precharge the setup nodes based on the data strobe clock and the differential input data.

A transconductance amplifier is provided with: a cross-coupled differential pair (31) having one set of differential pair transistors in which signals whose polarities are opposite to each other are inputted to gates thereof, drains of one of the differential pair transistors being connected to drains of another one of the differential pair transistors, and a control circuit (32) comprised of logical circuits, for outputting a binary signal to the common source of each of the differential pair transistors on the basis of an output-level control signal and a polarity control signal which are inputted thereto.

An amplifier circuit includes: a first inverter and a second inverter coupled in a cross-coupled form during an amplification operation and suitable for amplifying a voltage difference between a first line and a second line; a first isolation switch suitable for electrically connecting the first line and an output terminal of the first inverter to each other; a second isolation switch suitable for electrically connecting the second line and an output terminal of the second inverter to each other; and an equalizing switch suitable for electrically connecting the output terminal of the first inverter and the output terminal of the second inverter to each other, wherein before the amplification operation, a first offset compensation operation for turning on the second isolation switch and the equalizing switch and a second offset compensation operation for turning on the first isolation switch and the equalizing switch are performed.

Techniques for monitoring a distortion signal of a power amplifier circuit, where the output of a distortion monitoring circuit includes little or no fundamental signal and closely represents the actual distortion of the amplifier circuit of a wired communications system. The power amplifier circuit can generate a distortion feedback signal that does not affect the power amplifier's output power capability, e.g., no inherent loss in the fundamental output of the amplifier. That is, using a distortion monitor circuit, the power amplifier circuit can resolve a distortion feedback signal from the intended output signal of the output power amplifier circuit.

A differential circuit includes a differential pair and a back gate bias circuit. The differential circuit includes a first MOS transistor and a second MOS transistor provided between a first power supply line, to which a first power supply voltage is applied, and a second power supply line, to which a second power supply voltage is applied. The back gate bias circuit applies a bias voltage closer to the first power supply voltage than source potentials of the first MOS transistor and the second MOS transistor to back gates of the first MOS transistor and the second MOS transistor.

An amplifier circuit includes: a first inverter and a second inverter coupled in a cross-coupled form during an amplification operation and suitable for amplifying a voltage difference between a first line and a second line; a first isolation switch suitable for electrically connecting the first line and an output terminal of the first inverter to each other; a second isolation switch suitable for electrically connecting the second line and an output terminal of the second inverter to each other; and an equalizing switch suitable for electrically connecting the output terminal of the first inverter and the output terminal of the second inverter to each other, wherein before the amplification operation, a first offset compensation operation for turning on the second isolation switch and the equalizing switch and a second offset compensation operation for turning on the first isolation switch and the equalizing switch are performed.

An integrated circuit and method for providing a variable gain amplifier are disclosed. One embodiment of the a variable gain amplifier comprises at least one load, a cascode circuit coupled to the load, a folded-gilbert stage, coupled to the cascode circuit, the folded-gilbert stage comprising a main differential pair of transistors and an internal pair of transistors, and a digital to analog converter, coupled to the folded-gilbert stage, for steering currents between the main differential pair of transistors and the internal pair of transistors to change a gain of the variable gain amplifier.

A transconductance amplifier is provided with: a cross-coupled differential pair (31) having one set of differential pair transistors in which signals whose polarities are opposite to each other are inputted to gates thereof, drains of one of the differential pair transistors being connected to drains of another one of the differential pair transistors, and a control circuit (32) comprised of logical circuits, for outputting a binary signal to the common source of each of the differential pair transistors on the basis of an output-level control signal and a polarity control signal which are inputted thereto.

A transistor cell can be modeled as a transistor with a collector, a base, and an emitter operating with a current at the collector to produce a minimum transconductance in the transistor cell that increases a current gain and improves at least one operating characteristic of the transistor cell. The operating characteristics include bandwidth, gain, and output power.

A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first trans conductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.