A reference voltage generator includes a voltage generation circuit, an amplifier, a diode unit and a transistor. The voltage generation circuit includes an output terminal for outputting a reference voltage, a first terminal having an operational voltage, and a second terminal. The amplifier includes an input terminal coupled to the first terminal of the voltage generation circuit, an output terminal, a first terminal coupled to a first voltage terminal, and a second terminal. The diode unit includes a first terminal coupled to the second terminal of the amplifier, and a second terminal coupled to the second terminal of the voltage generation circuit and a second voltage terminal. The transistor includes a first terminal coupled to the first terminal of the amplifier, a second terminal coupled to the output terminal of the voltage generation circuit, and a control terminal coupled to the output terminal of the amplifier.

The present invention relates to a continuous time linear equalizer comprising a first signal path comprising a high pass filter and a first controllable transconductance unit and a second signal path comprising a second controllable transconductance unit. The continuous time linear equalizer comprises a summation node configured to receive complementary current summation signals of the first transconductance unit and the second transconductance unit. The high pass filter comprises a first port configured to receive an input signal, a second port coupled to a control port of the first transconductance unit and a third port coupled to the summation node. The invention is notably also directed to a corresponding method and a corresponding design structure.

An amplifier circuit has a variable gain amplifier including an input receiving an input signal and an open-conduction output, and an output stage including an input coupled to the open-conduction output of the variable gain amplifier and an output providing an output signal of the amplifier circuit. The variable gain amplifier has a first transistor and second transistor each having a control input receiving the input signal. A third transistor has a control terminal receiving a control signal and a first conduction terminal coupled to a first conduction terminal of the first transistor and a second conduction terminal being a first terminal of the open-conduction output. A fourth transistor has a control terminal receiving the control signal and a first conduction terminal coupled to a first conduction terminal of the second transistor and a second conduction terminal being a second terminal of the open-conduction output.

A CMOS channel select filter for DVB-H direct-conversion receives based on a transresistance amplifier (TRA) is disclosed. The channel select filter includes a fully differential transresistance amplifier (FDTRA) configured to change an input current at each differential input terminal to a voltage at each differential output terminal based on an impedance at a corresponding differential impedance terminal. The channel select filter also includes two feedback resistors, each having one end connected to a respective differential output terminal of the FDTRA and having another end connected to the node, two first capacitors, each connected between ground and the node, and two second capacitors, each connected between ground and a respective differential impedance terminal.

Certain aspects of the present disclosure generally relate to a differential amplifier implemented using a complementary metal-oxide-semiconductor (CMOS) structure. The differential amplifier generally includes a first pair of transistors and a second pair of transistors coupled to the first pair of transistors. The gates of the first pair of transistors and gates of the second pair of transistors may be coupled to respective differential input nodes of the differential amplifier, and drains of the first pair of transistors and drains of the second pair of transistors may be coupled to respective differential output nodes of the differential amplifier. In certain aspects, the differential amplifier may include a biasing transistor having a drain coupled to a source of a transistor of the first pair of transistors and having a gate coupled to a common-mode feedback (CMFB) path of the differential amplifier.

A waveform shaping circuit includes a first parallel circuit including a first capacitance element and a first resistance element coupled in parallel with each other, a positive pulse voltage being applied to a first terminal of the first capacitance element and a second terminal of the first resistance element, a first rectifier circuit disposed between a point of coupling between a third terminal of the first capacitance element and a fourth terminal of the first resistance element and an output terminal.

In one form, a signal generator system such as a power amplifier system includes an amplification stage, a lowpass filter, and a controller. The amplification stage includes a first amplifier having an input for receiving an input signal, a control input for receiving a first control signal, and an output. The lowpass filter has a first input coupled to the output of the first amplifier, and an output. The controller has a first input coupled to the output of the lowpass filter, and a first output coupled to the control input of the first amplifier, wherein the controller varies the first control signal to reduce a difference between the output of the lowpass filter and a first target voltage level.

Amplifier circuitry has sampling circuitry which samples an input voltage, a quantizer which quantizes an output voltage of the sampling circuitry and outputs an output code, a differential amplifier which amplifies a differential voltage between the output voltage of the sampling circuitry and a reference voltage and performs offset adjustment according to the output code of the quantizer, and a first capacitor which is connected between an output node of the differential amplifier and an output node of the sampling circuitry.

A reference voltage generator includes a voltage generation circuit, an amplifier, a diode unit and a transistor. The voltage generation circuit includes an output terminal for outputting a reference voltage, a first terminal having an operational voltage, and a second terminal. The amplifier includes an input terminal coupled to the first terminal of the voltage generation circuit, an output terminal, a first terminal coupled to a first voltage terminal, and a second terminal. The diode unit includes a first terminal coupled to the second terminal of the amplifier, and a second terminal coupled to the second terminal of the voltage generation circuit and a second voltage terminal. The transistor includes a first terminal coupled to the first terminal of the amplifier, a second terminal coupled to the output terminal of the voltage generation circuit, and a control terminal coupled to the output terminal of the amplifier.

Certain aspects of the present disclosure generally relate to a differential amplifier implemented using a complementary metal-oxide-semiconductor (CMOS) structure. The differential amplifier generally includes a first pair of transistors and a second pair of transistors coupled to the first pair of transistors. The gates of the first pair of transistors and gates of the second pair of transistors may be coupled to respective differential input nodes of the differential amplifier, and drains of the first pair of transistors and drains of the second pair of transistors may be coupled to respective differential output nodes of the differential amplifier. In certain aspects, the differential amplifier may include a biasing transistor having a drain coupled to a source of a transistor of the first pair of transistors and having a gate coupled to a common-mode feedback (CMFB) path of the differential amplifier.