An amplifier includes a differential amplifier and a compensator. A differential amplifier includes a current source and paired transistors. The paired transistors generate an output signal by dividing a source current supplied by the current source into emitter currents of the paired transistors in response to a difference between an input signal and a reference signal. A compensator includes an amplifying transistor and a feedback circuit that feeds a collector current output from a collector of the amplifying transistor back to a base of the amplifying transistor therethrough. The compensator generates the reference signal at a base of the amplifying transistor. The compensator decreases power consumption of the amplifying transistor when the collector current increases, and increases the power consumption of the amplifying transistor when the collector current decreases. The compensator suppresses a peaking of gain in a low frequency band.

Embodiments generally relate to a conversion arrangement, a driver arrangement, and a method of producing a complementary complementary metal-oxide-semiconductor (CMOS) output signal for driving a modulator device. The conversion arrangement includes a differential amplifier configured to produce a first amplified signal based on the differential input signal, and at least two transimpedance amplifiers (TIAs) coupled with respective outputs of the differential amplifier and configured to produce a second amplified signal based on the first amplified signal. Respective bias voltages for the TIAs are based on the first amplified signal. The conversion arrangement further includes a common-mode feedback arrangement coupled with outputs of the TIAs and configured to control the first amplified signal based on the second amplified signal, thereby controlling the bias voltages, wherein the complementary CMOS output signal is based on the second amplified signal.

Described examples include multistage amplifier circuits having first and second forward circuits, a comparator or sensor circuit coupled to sense a signal in the second forward circuit to identify nonlinear operation or slewing conditions in the multistage amplifier circuit, and one or more sample hold circuits operative according to a sensor circuit output signal to selectively maintain the amplitude of an amplifier input signal in the second forward circuit and/or in a feedback circuit in response to the sensor circuit output signal indicating nonlinear operation or slewing conditions in the multistage amplifier circuit. Certain examples further include a clamping circuit operative to selectively maintain a voltage at a terminal of a Miller compensation capacitance responsive to the comparator output signal indicating nonlinear operation or slewing conditions.

A main amplifier generates an output signal S.sub.OUT according to a difference between first and second voltages VP and VN. A first gm amplifier is arranged as a differential input stage. A second, fully differential, gm amplifier amplifies a voltage difference between its non-inverting and inverting input terminals, and outputs a differential current signal I.sub.3N/I.sub.3P via its inverting and non-inverting output terminals. An integrator integrates a differential input current I.sub.4P/I.sub.4N input via its non-inverting and inverting input terminals, and samples and holds the signal every predetermined period, to generate a differential voltage signal. A first selector is arranged as an upstream stage of the second gm amplifier, and outputs the differential input signal without change or otherwise after swapping. A second selector is arranged as a downstream stage of the second gm amplifier, and outputs the signal I.sub.3N/I.sub.3P output from the second gm amplifier without change or otherwise after swapping.

A transmission circuit includes a driver circuit that includes: a transistor to regulate output impedance, and a switching circuit that is connected to the transistor to regulate output impedance and switches an output polarity for differential output; and a bias circuit that includes: a first replica circuit including another transistor corresponding to the transistor to regulate output impedance, the bias circuit generating a gate voltage so as to make a current-voltage characteristic of the transistor to regulate output impedance correspond to a first output impedance value, and supply the gate voltage to a gate of the transistor to regulate output impedance.

The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input. A second transistor receives a second input. A plurality of impedance networks is coupled between the first transistor and the second transistor. At least one impedance network of the plurality of impedance networks includes a first impedance path and a second impedance path. The first impedance path is activated during single ended operation, and the second impedance path is activated during differential operation.

A differential amplifier is disclosed. The differential amplifier includes: a pair of input terminals externally receiving an input signal; a first differential pair including a first transistor, a second transistor, a first resistor, and a second resistor and configured to generate a first signal; a second differential pair including a third transistor, a fourth transistor, a third resistor, and a fourth resistor and configured to generate a second signal; a current source connected to the first, second, third, and fourth resistors and configured to provide a current to the first and second differential pairs; a pair of level shifters configured to generate a shifted signal from the input signal; and a pair of output terminals externally outputting an output signal containing the first and second signals, wherein the first and second transistors receive the input signal and the third and fourth transistors receive the shifted signal.

An input stage circuit for an operational amplifier includes first and second differential pairs connected in parallel between positive and negative input terminals. Each differential pair comprises a pair of transistors that are intentionally and systematically mismatched. The mismatching of each transistor pair creates a pre-trim input offset voltage for the circuit. However, a unique current is utilized to bias each of the first and second differential pairs. By adjusting the differential between the bias currents, a composite input offset voltage is created that combines with the pre-trim input offset voltage to yield a total input offset voltage for the circuit that approaches zero. Additionally, adjusting the differential between the bias currents simultaneously trims the temperature coefficient of the total input offset voltage to zero while using limited power and producing minimal noise.

One imaging apparatus includes a first amplifier circuit, a second amplifier circuit, and a limiter circuit that limits the output of the first amplifier circuit, and further includes a configuration to clamp the output of the limiter circuit. Moreover, another imaging apparatus includes a fully differential amplifier circuit that outputs an amplified noise signal amplified from a noise signal, and an amplified optical signal amplified from an optical signal, and an output limiting circuit that limits each of the amplitude range of the amplified noise signal and the amplitude range the amplified optical signal.

A configurable output stage for a DAC channel can include an output stage that can receive an analog output from a DAC and outputs a signal to an output terminal. The output stage can be configurable between a voltage mode and a current mode. In the voltage mode, the output stage can supply the analog signal to the output terminal as a voltage signal. In the current mode, the output stage can supply the analog signal to the output signal as a current signal. The output stage can receive user input to select the desired mode. Consequently, an integrated circuit can be implemented with multiple DAC channels, each having the configurable output stage. A user can choose how many channels they want to operate in a voltage output mode, and how many channels they want to operate in a current output mode, depending on their individual requirements.