H03F2203/45031

DIFFERENTIAL AMPLIFIER INCLUDING CANCELLATION CAPACITORS

In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.

Low noise differential amplifier

In one general aspect, an amplifier can include an input amplifier circuit configured to receive a bias current and receive, as an input, a signal pair connected differentially to the input amplifier circuit, the input amplifier circuit configured to output a differential output signal pair based on the received differential input signal pair, a feedback amplifier circuit configured to receive an average of the differential output signal pair and configured to provide a bias setting output for controlling the bias current, and an output buffer circuit configured to buffer the differential output signal pair, the buffering resulting in a buffered differential output signal pair capable of driving a resistive load.

POWER-CYCLING VOLTAGE REFERENCE
20190339730 · 2019-11-07 ·

A low-noise, low-power reference voltage circuit can include an operational transconductance amplifier (OTA) with inputs coupled to a temperature-compensated voltage, such as can be provided by source-coupled first and second field-effect transistors (FETs) having different threshold voltages. A capacitive voltage divider can teed back a portion of a reference voltage output by the OTA to the inputs of the OTA to help establish or maintain the temperature-compensated voltage across the inputs of the OTA. A switching network can be used, such as initialize the capacitive voltage divider or other capacitive feedback circuit, such as during power-down cycles, or when resuming powered-on cycles. A switch can interrupt current to the OTA during the power-down cycles to save power. The cycled voltage reference circuit can provide a reference voltage to an ADC reservoir capacitor. Powering down can occur during analog input signal sampling, during successive approximation routine (SAR) conversion, or both.

DIFFERENTIAL AMPLIFIER INCLUDING CANCELLATION CAPACITORS

In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.

Differential amplifier including cancellation capacitors

In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.

System and method for reducing output harmonics

In one form, a signal generator system such as a power amplifier system includes an amplification stage, a lowpass filter, and a controller. The amplification stage includes a first amplifier having an input for receiving an input signal, a control input for receiving a first control signal, and an output. The lowpass filter has a first input coupled to the output of the first amplifier, and an output. The controller has a first input coupled to the output of the lowpass filter, and a first output coupled to the control input of the first amplifier, wherein the controller varies the first control signal to reduce a difference between the output of the lowpass filter and a first target voltage level.

APPARATUS AND METHOD FOR REDUCING AMPLIFIER FEEDBACK CAPACITOR WITH BYPASS AMPLIFICATION STAGE
20190294295 · 2019-09-26 ·

A touchscreen controller includes a set of transmitters for generating transmit signals applied to electrically-conductive transmit lines of a touchscreen panel, and a set of receivers configured to receive the signals via electrically-conductive receive lines that are capacitively coupled to the transmit lines. Each receiver includes an integrator to integrate the received current signal to generate an output voltage used for determining a location, if any, of a finger or object touching the panel. The integrator includes input and output amplification stages, and a feedback capacitor coupled between an input and output of the cascaded amplification stages. The capacitance of the feedback capacitor is configured so that the integrator achieves a desired rejection of a received jammer current signal. To reduce the size of the feedback capacitor, a bypass amplification stage is provided to steer away some of the input jammer current from the input of the integrator.

LOW NOISE DIFFERENTIAL AMPLIFIER

In one general aspect, an amplifier can include an input amplifier circuit configured to receive a bias current and receive, as an input, a signal pair connected differentially to the input amplifier circuit, the input amplifier circuit configured to output a differential output signal pair based on the received differential input signal pair, a feedback amplifier circuit configured to receive an average of the differential output signal pair and configured to provide a bias setting output for controlling the bias current, and an output buffer circuit configured to buffer the differential output signal pair, the buffering resulting in a buffered differential output signal pair capable of driving a resistive load.

SYSTEM AND METHOD FOR REDUCING OUTPUT HARMONICS

In one form, a signal generator system such as a power amplifier system includes an amplification stage, a lowpass filter, and a controller. The amplification stage includes a first amplifier having an input for receiving an input signal, a control input for receiving a first control signal, and an output. The lowpass filter has a first input coupled to the output of the first amplifier, and an output. The controller has a first input coupled to the output of the lowpass filter, and a first output coupled to the control input of the first amplifier, wherein the controller varies the first control signal to reduce a difference between the output of the lowpass filter and a first target voltage level.

Offset Cancellation Scheme
20190097593 · 2019-03-28 ·

An offset cancellation circuit and method are provided where successive stages of cascaded amplifiers are operated in a saturated state. Biasing is provided, by a feedback amplifier, connected in a feedback loop for each cascaded amplifier, so as to be responsive, in a non-saturated state, to the input of an associated amplifier stage operating in the saturated state.