An amplifier circuit may include an isolated amplifier circuit, disposed on a high voltage side of the amplifier circuit, and arranged to generate an isolated output signal. The amplifier circuit may include a first optocoupler circuit, disposed to receive the isolated output signal from the isolated amplifier circuit and an output amplifier circuit, disposed on a low voltage side of the amplifier circuit, and coupled to receive an optical output signal from the optocoupler circuit. The amplifier circuit may also include a calibration circuit, coupled to the output amplifier circuit, to generate a calibration initiation signal, and a second optocoupler circuit, disposed to receive the calibration initiation signal, and to output a switch signal, wherein a reference voltage is output to the isolated amplifier circuit.

A method for calculating a calibration gain used for common-mode rejection in a current sensing system may include measuring a first value of a common-mode voltage associated with the current sensing system and a first output value of the current sensing system occurring at the first value of the common-mode voltage, measuring a second value of the common-mode voltage associated with the current sensing system and a second output value of the current sensing system occurring at the second value of the common-mode voltage, and based on a difference between the second output value of the current sensing system and the first output value of the current sensing system and a difference between the second value of the common-mode voltage and the first value of the common-mode voltage, calculating the calibration gain.

A receiver includes a first T-coil circuit at an input of the receiver and configured to receive an input signal, a termination impedance coupled to the first T-coil circuit and configured to match an impedance of a transmission line coupled to the first T-coil circuit, and an amplifier including a first input and a second input and configured to amplify a differential signal at the first and second inputs, a calibration switch coupled to the amplifier and configured to selectively electrically connect or disconnect the first and second inputs of the amplifier, and a first receive switch configured to selectively electrically connect or disconnect a center node of the first T-coil circuit and the amplifier.

A data storage apparatus includes storage and a controller configured to control the storage in response to a request from a host. The controller includes an internal voltage trimming circuit which includes: an integration circuit configured to generate an integration signal by integrating a difference between a test voltage output from a device under test (DUT) and a reference voltage; a comparison circuit configured to generate a comparison signal by comparing the integration signal and the reference voltage; a transition detection circuit configured to output a detection signal according to level transition of the comparison signal; a counter configured to receive an initial trimming code and generate a preliminary trimming code by increasing or reducing the initial trimming code in response to the detection signal; and an average circuit configured to generate a final trimming code by averaging the preliminary trimming code for a determined time interval and provide the final trimming code to the storage.

A regulator includes an operational amplifier, a programmable offset voltage, and a circuit. The operational amplifier includes a non-inverting input, an inverting input, and an output. The programmable offset voltage is configured to cancel a built-in offset voltage of the regulator based on a code. The circuit is configured to set the code based on a sensed built-in offset voltage of the regulator in response to an offset cancellation calibration mode enable signal.

An integrated circuit (IC) includes a current source device configured to generate a bias current. The IC also includes a comparator, a circuit, a memory, and a digital-to-analog circuit (DAC). The comparator has a first input, a second input, and a comparator output. The first input receives a reference voltage, and the second input receives a voltage indicative of a bias current through the IC. The circuit is coupled to the comparator output. The circuit iteratively generates a final trim code based on an output signal from the comparator. The memory stores the final trim code. The DAC controls a level of the bias current through the current source device based on the final trim code.

An amplifier circuit arrangement and a method for calibrating the same. In an embodiment an amplifier circuit arrangement includes a desired signal path including a differential amplifier for an analog signal having an input side and an output side and an analog-to-digital converter having an output terminal, a first feedback path to calibrate an offset of the desired signal path coupled to differential signal lines at the output side of the differential amplifier and to differential signal lines at the input side of the differential amplifier, the first feedback path including a comparator and at least one counter controlled by an output of the comparator and a second feedback path to calibrate a drift of the desired signal path coupled to the output terminal of the analog-to-digital converter and to the differential signal lines at the input side of the differential amplifier, the second feedback path including an average filter.

A system includes an amplification circuit and offset calibration circuit. The amplification circuit includes a modulation circuit operable to modulate a received signal, an amplifier operable to amplify the modulated signal, and a modulation circuit operable to demodulate the amplified signal. The offset calibration circuit includes a logic circuit operable to set a control signal and adjust the control signal based on an output of the amplification circuit, where the output is based on the demodulated signal, and a compensation signal generator operable to generate a compensation signal based on the control signal to compensate for an offset associated with the amplification circuit, and apply the compensation signal on the amplification circuit to adjust the output of the amplification circuit. The offset calibration circuit in conjunction with the application circuit reduces flicker, offset, and offset drift, and also suppresses the upmodulate ripple due to chopping.

The present invention provides a continuous time circuit including an amplifier and a RC calibration circuit. In the operations of the continuous time circuit, the amplifier is configured to amplify an input signal to generate an output signal, and the RC calibration circuit is configured to adjust a capacitance of a compensation capacitor of the amplifier according to a RC product measurement result.

An operational amplifier includes: a first amplifier stage, configured to generate first output voltages according to first input voltages; a second amplifier stage, configured to generate second output voltages according to the first output voltages; a second output stage circuit, configured to replicate an equivalent or a scaled-down version of the first output stage circuit; a first common-mode feedback circuit, configured to keep an output common-mode voltage of the second output stage circuit at a predetermined value; a logic loop circuit configured to, when the operational amplifier operates in a direct current calibration phase, adjust a difference between the first output voltages; a bias circuit, configured to generate a voltage close to a common-mode voltage of the first output voltages produced after the operational amplifier is turned on, the voltage serving as a reference voltage of a second common-mode feedback circuit.