An integrated circuit chip includes a first single-ended-to-differential amplifier configured to generate a differential output associated with an input of said first single-ended-to-differential amplifier; a second single-ended-to-differential amplifier arranged in parallel with said first single-ended-to-differential amplifier; a first set of switch circuits arranged downstream of said first single-ended-to-differential amplifier; a second set of switch circuits arranged downstream of said second single-ended-to-differential amplifier; and a first differential-to-single-ended amplifier arranged downstream of a first one of said switch circuits in said first set and downstream of a first one of said switch circuits in said second set.

A parallel input and dynamic cascaded OTA (operational transconductance amplifier includes: plural sub-OTAs which generate corresponding plural transconductance output currents according to corresponding plural differential input voltages; and at least one cascading capacitor which is cascaded between a first sub-OTA and a second sub-OTA. A second transconductance output current generated by the second sub-OTA is coupled through the cascading capacitor to generate a transient bias current on a common mode bias node of the first sub-OTA, thus providing the transient bias current to a differential pair circuit of the first sub-OTA in a case when a transient variation occurs in the differential input voltage corresponding to the first sub-OTA, so that a loop bandwidth and a response speed during a transient state are enhanced.

A semiconductor device includes first member that includes a switch made of a semiconductor element made from an elemental semiconductor. The first member is joined to a second member including a radio-frequency circuit including a semiconductor element made from a compound semiconductor. The switch and the radio-frequency circuit are connected by a path. The path includes an inter-member connection wire made of a metal pattern arranged on an interlayer insulating film extending from a surface of the second member to a surface of the first member or a conductive member allowing a current to flow in a direction crossing an interface where the first member and the second member are joined.

A circuital system that includes a differential low-pass filter having a differential output and operable in a first voltage domain. Some embodiments include a differential integrator including a differential input and a differential output, and operable in a second voltage domain different from the first voltage domain. Some embodiments include a pair of AC coupling capacitors coupling the differential output of the differential low-pass filter to the differential input of the differential integrator.

A circuital system that includes a differential low-pass filter having a differential output and operable in a first voltage domain. Some embodiments include a differential integrator including a differential input and a differential output, and operable in a second voltage domain different from the first voltage domain. Some embodiments include a pair of AC coupling capacitors coupling the differential output of the differential low-pass filter to the differential input of the differential integrator.

An amplifying circuit including a first gain circuit, a second gain circuit, a Miller capacitor, a positive feedback circuit and a feedforward gain circuit. The second gain circuit is configured to receive a first gain signal from the first gain circuit and generate a second gain signal. The Miller capacitor, the positive feedback circuit and the feedforward gain circuit are electrically coupled between an input terminal and an output terminal of the second gain circuit. The positive feedback circuit is configured to feedback the signal of the output terminal of the second gain circuit to the input terminal of the second gain circuit. The feedforward gain circuit is configured to amplify the first gain signal to output a third gain signal to the output terminal of the second gain circuit.

An electronic-system for implementing decision-feedback equalization (DFE) includes a first stage including a first-amplifier. The first amplifier including an in-built adder circuit. The first amplifier being configured to charge one or more output nodes of the first amplifier to a first voltage using a summed signal based on input data and a feedback signal in response to a first-clock variation, wherein the feedback signal is a partially-regenerated analog output from a regenerating amplifier. A second stage is includes a second amplifier configured as the regenerating amplifier and connected to the one or more output nodes of the first amplifier, the second amplifier configured to amplify charged output nodes of the second stage to a second voltage in response to a second-clock variation and apply a regenerative gain to the amplified second-voltage during the second-clock variation to generate the partially-regenerated analog output. A third stage includes a slave latch that is configured to resolve the partially-regenerated analog output at the output nodes of the second stage into non-return to zero (NRZ) digital values at an output of the third stage.

An amplifying circuit including a first gain circuit, a second gain circuit, a Miller capacitor, a positive feedback circuit and a feedforward gain circuit. The second gain circuit is configured to receive a first gain signal from the first gain circuit and generate a second gain signal. The Miller capacitor, the positive feedback circuit and the feedforward gain circuit are electrically coupled between an input terminal and an output terminal of the second gain circuit. The positive feedback circuit is configured to feedback the signal of the output terminal of the second gain circuit to the input terminal of the second gain circuit. The feedforward gain circuit is configured to amplify the first gain signal to output a third gain signal to the output terminal of the second gain circuit.

Chopper amplifiers with low intermodulation distortion (IMD) are provided. To compensate for IMD, at least one distortion compensation channel is included in parallel with chopper amplifier circuitry of a main signal channel. Additionally, output selection switches are included for selecting between the output of the main signal path and the distortional compensation channel(s) over time to maintain the output current continuous. Such IMD compensation can be realized by filling in missing current of the main signal channel using the distortion compensation channel(s), or by using channel outputs only when they have settled current.

An analog-to-digital converter circuit includes: a first operation amplifier suitable for comparing a ramp voltage and a voltage to be converted so as to produce an amplification result and outputting the amplification result; a second operation amplifier suitable for comparing the amplification result transferred to a first input terminal with a reference voltage transferred to a second input terminal so as to produce a comparison result and outputting the comparison result; a leakage current measurer suitable for measuring a leakage current to the first input terminal; and a leakage current generator suitable for causing a current of the same amount as that of the leakage current measured by the leakage current measurer to flow to the second input terminal.