A programmable gain amplifier that comprises: a transconductance amplifier, a switch leakage compensation circuit and a transimpedance amplifier. The transconductance amplifier provides a transconductance amplifier current signal and includes a switchable resistance network. The switch leakage compensation circuit provides a compensation current signal and comprises a switchable compensation resistance network. The transimpedance amplifier provides the output voltage signal based on the difference between the transconductance amplifier current signal and the compensation current signal. The switchable compensation resistance network comprises a plurality of branches in parallel with each other, wherein each branch includes: a gain-mimicking switch that has a corresponding gain-setting switch in the switchable resistance network; and a leakage-current-conducting switch in series with the gain-mimicking switch. The leakage-current-conducting switch is openable and closable in accordance with the complement of a switch control signal that is used to control the gain-mimicking switch in the same branch.

Disclosed is an amplifier capable of minimizing shortcircuit current of an output stage of a buffer upon transition of an output voltage while having a high slew rate without increasing power consumption. The amplifier includes an input unit, a conversion unit, an amplification unit, a frequency compensation circuit, and a short-circuit current minimization circuit. Alternatively, the amplifier includes an input unit, a conversion unit, an amplification unit, a frequency compensation circuit, a short-circuit current minimization circuit, and a slew rate improvement circuit.

An amplifier of an input circuit includes: a first PMOS transistor having a gate connected to a first node, a source connected to a second node, and a drain connected to a third node; a second PMOS transistor having a gate connected to a fourth node that inputs a reference signal, a source connected to the second node, and a drain connected to a fifth node; a current source connected between a power supply voltage and the second node; a load circuit connected between the third node and a ground voltage; a first NMOS transistor having a gate connected to the first node, a drain connected to the power supply voltage, and a source connected to the fifth node; and a second NMOS transistor having a gate connected to the fourth node, a drain connected to the power supply voltage, and a source connected to the third node.

An amplifier arrangement has a first differential stage with a first transistor pair, a second differential stage with a first and a second transistor pair, each pair having a common source connection. The amplifier arrangement further has a first complementary differential stage with a transistor pair having opposite conductivity type, and a second complementary differential stage with a first and a second transistor pair of the complementary conductivity type. The first and the second complementary differential stage are connected symmetrically compared to the first and the second differential stage. The transistors of the second differential stage and the second complementary differential stage are symmetrically connected to form respective first, second, third and fourth current paths. A pair of output terminals is coupled to the first and the fourth current path. Gate terminals of the transistors are coupled to a respective pair of input terminals.

An wideband amplifier circuit such as a transimpedance amplifier achieves improved amplifier and/or system performance, such as a reduced input impedance. The transimpedance amplifier may use a complementary common gate stage that receives an input signal and generates current to a current summing stage. In one instance, an input current is received by a complimentary common gate stage that includes a first common gate transistor and a second common gate transistor, each having different polarities, in which the first terminals of each of the transistors are configured to receive the input current. Each of the transistors generates an output current to a current summing stage that generates an output voltage at an output terminal. The output voltage may be based on the combined currents from the first common gate transistor and second common gate transistor.

A circuit includes an active balun having an RF signal input and having differential signal outputs, the active balun including a first pair of transistors coupled to the RF signal input, the first pair of transistors including a first transistor of a first type and a second transistor of a second type, wherein the first type and second type are complementary; and an intermodulation distortion (IMD) sink circuit having an operational amplifier (op amp) coupled between a first node and a second node, wherein the first transistor and second transistor are coupled in series between the first node and the second node.

A circuit includes an active balun having an RF signal input and having differential signal outputs, the active balun including a first pair of transistors coupled to the RF signal input, the first pair of transistors including a first transistor of a first type and a second transistor of a second type, wherein the first type and second type are complementary; and an intermodulation distortion (IMD) sink circuit having an operational amplifier (op amp) coupled between a first node and a second node, wherein the first transistor and second transistor are coupled in series between the first node and the second node.

A semiconductor circuit device includes a differential amplifier circuit and a switching signal output circuit. The differential amplifier circuit outputs a current based on an output voltage of a switching regulator. The switching signal output circuit outputs a switching signal for a switching device based on a voltage at an output node of the differential amplifier circuit and a voltage corresponding to an inductor current flowing through an inductor. The differential amplifier circuit includes a first output-stage transistor and a second output-stage transistor. The first output-stage transistor is provided between a first power supply node and a first node and outputs the current. The second output-stage transistor is provided between the first node and the output node and has a gate to which a first bias voltage is input.

An wideband amplifier circuit such as a transimpedance amplifier achieves improved amplifier and/or system performance, such as a reduced input impedance. The transimpedance amplifier may use a complementary common gate stage that receives an input signal and generates current to a current summing stage. In one instance, an input current is received by a complimentary common gate stage that includes a first common gate transistor and a second common gate transistor, each having different polarities, in which the first terminals of each of the transistors are configured to receive the input current. Each of the transistors generates an output current to a current summing stage that generates an output voltage at an output terminal. The output voltage may be based on the combined currents from the first common gate transistor and second common gate transistor.

A differential amplification circuit may include a differential amplification unit including a first input transistor and a second input transistor, and suitable for differentially amplifying input signals inputted through the first and second input transistors; a first input control section suitable for turning off the first input transistor when the differential amplification circuit is disabled and transferring a first input signal to the first input transistor when the differential amplification circuit is enabled; and a second input control section suitable for turning off the second input transistor when the differential amplification circuit is disabled and transferring a second input signal to the second input transistor when the differential amplification circuit is enabled.