A system for sensing an electrical quantity may include a sensing stage configured to sense the electrical quantity and generate a sense signal indicative of the electrical quantity, wherein the electrical quantity is indicative of an electrical signal generated by a Class-DG amplifier configured to drive a load wherein the Class-DG amplifier has multiple signal-level common modes and a common-mode compensator configured to compensate for changes to a common-mode voltage of a differential supply voltage of the driver occurring when switching between signal-level common modes of the Class-DG amplifier.

A rapid sensing value estimation circuit and a method thereof are provided. The circuit includes a first sensing unit, an integration sensing circuit and a rapid estimation circuit. The rapid estimation circuit includes a clock generator, a second counter, a first digital comparator, an arithmetic module and a remainder calculation module. The clock generator generates a clock signal with a first frequency. The second counter counts the clock signal within the integration time to generate a second count value. The first digital comparator determines whether the second count value exceeds a first predetermined count value when the first count value increases. The arithmetic module calculates an estimated count value result and a remainder, and the remainder calculation module can further calculate and estimate values of decimal places of this signal based on the remainder.

Methods, systems, and devices for operating an amplifier with a controllable pull-down capability are described. A memory device may include a memory array and a power circuit that generates an internal signal for components in the memory array. The power circuit may include an amplifier and a power transistor that is coupled with the amplifier. A pull-down capability of the amplifier may be controllable using an external signal that is based on a difference between a reference signal and the internal signal. The power circuit may also include a comparator that is coupled with the amplifier and configured to compare the reference signal and the internal signal. Components of the comparator may be integrated with components of the amplifier, may share a bias circuit, and may use nodes within the amplifier to control the comparator. A signal output by the comparator may control the pull-down capability of the amplifier.

Embodiments of the disclosure include a switch having an on-state resistance that varies based on a temperature coefficient of the switch and an overcurrent protection circuit coupled to the switch and having an adjustable overcurrent threshold level determined based on an adjustable voltage generated by the overcurrent protection circuit, the adjustable voltage generated based on the temperature coefficient of the switch.

A self-bias signal generating circuit includes a differential amplifier circuit including a current source transistor. The differential amplifier circuit is configured to amplify at least a pair of differential input signals to generate at least a pair of differential output signals, and the differential amplifier circuit is configured to generate an output common-mode signal based on the at least a pair of differential output signals. The self-bias signal generating circuit includes a feedback loop circuit configured to adjust a voltage level of the output common-mode signal to generate a self-bias signal, and the feedback loop circuit is configured to provide the self-bias signal to the differential amplifier circuit. The self-bias signal is applied to a gate terminal of the current source transistor.

A bipolar amplification circuit has a control amplifier (101), a dependent current source (102) configured to supply current to an output terminal (104) and driven by an output from the control amplifier (101). A dependent current sink (103) is configured to receive current from the output terminal (104) and is also driven by the output from the control amplifier (101). The control amplifier includes an inverting input (105) and an input signal is supplied to this inverting input. A negative feedback signal of a first polarity is supplied to the inverting input from said dependent current source and a negative feedback signal of a second polarity is supplied to said inverting input from said dependent current sink.

Provided are a semiconductor device and a sensor system capable of achieving improvement of noise resistance. Thus, an output circuit 106a in the semiconductor device includes: input terminals 207n, 207p; and an output terminal 208; an output amplifier 201 connecting the input terminals 207n, 207p to the output terminal 208; a feedback element 203 returning the output terminal 208 to the input terminal 207n; a switching transistor 204; and a resistance element 206. A drain of the switching transistor 204 is connected to the input terminal 207n. The resistance element 206 is provided between a back gate of the switching transistor 204 and a power source Vdd and has impedance of a predetermined value or more for suppressing noise of a predetermined frequency generated at the input terminal 207n.

A calibration amplifier includes: a plurality of transistors and a variable resistor configured to change in response to clock pulses. During a calibration cycle, one of the plurality of transistors switches on in each calibration step based on a plurality of enable signals, and a gain of the calibration amplifier changes until an output voltage of the calibration amplifier exceeds a reference voltage and is set to a calibrated gain. The calibration amplifier outputs the output voltage by amplifying an input voltage using the calibrated gain.

A system for testing a subject transistor with constant power. The system may include an amplifier, a measurement voltage source, and a exercise voltage source. The amplifier may have an output connected to a gate of the subject transistor. The amplifier may have a first input and a second input. The measurement voltage source may be connected to the first input of the amplifier for use in measuring characteristics of the subject transistor. The exercise voltage source may be connected to the first input of the amplifier for exercising the subject transistor. The second input of the amplifier may be connected to a source of the subject transistor through a resistor.

Examples of the disclosure include a current-conditioning apparatus comprising a current mirror circuit including an input transistor adapted to receive an input current from an injection node and including an output transistor adapted to replicate in response to the received input current an output current with a predefined current mirror ratio, and a differential amplifier adapted to provide a negative feedback loop between the injection node of the apparatus and a control terminal of the input transistor of the current mirror circuit.