A sensor offset voltage compensation circuit includes a programmable gain amplifier (PGA) having an input loop configured to receive the signal output by a sensor (e.g., a voltage generated a sensor resistive bridge of a pressure sensor) and an output loop configured to furnish an output signal having a voltage that is greater than the input voltage. An offset compensation voltage is applied to at least one of the input loop or the output loop of the PGA to at least substantially cancel the zero-quantity offset voltage of the sensor from the output voltage.

The present disclosure relates to a device comprising two error amplifier stages having their first inputs interconnected, their second inputs interconnected and their outputs coupled to an output of the device, each stage comprising an operational amplifier; a circuit for calibrating the amplifier; a switch coupling an input of the amplifier to the first input; a switch coupling another input of the amplifier to the second input; a switch coupling an output of the amplifier to the stage output; a switch having on state which short-circuits the inputs of the amplifier; and a switch coupling the output of the amplifier to the calibration circuit.

The semiconductor device includes a Hall element, a first differential pair, a second differential pair, an output amplifier circuit, and a voltage divider circuit. The Hall element outputs a signal that is dependent on stress to be applied to a semiconductor substrate to the first differential pair. The voltage divider circuit divides a voltage into a divided voltage having a voltage dividing ratio that is dependent on the stress. The first differential pair outputs a first current based on the signal. The second differential pair outputs a second current based on the divided voltage and a reference voltage. The output amplifier circuit outputs a voltage based on the first and second currents. A gain of the output amplifier circuit is approximated by a sum of a difference between stress dependence coefficients of transconductances of the first and second differential pairs and a stress dependence coefficient of the voltage dividing ratio.

A complex current measurement circuit for a guard-sense capacitive sensor includes a periodic signal voltage source, a differential transimpedance amplifier circuit (DTA) and a demultiplexer circuit (DMX). At least one sense antenna electrode of the capacitive sensor is electrically connectable to a signal input line of the DMX which has signal output lines electrically connected to differential signal input lines of the DTA. The DTA includes operational amplifiers having input ports each electrically connected to one of the signal output lines. For each differential signal input line, either a capacitor is electrically connected between an output port of the voltage source and the differential signal input line, wherein an impedance of the capacitor is close to zero Ohm, or a galvanic connection is provided to one of the signal output lines. An output signal provided by the DTA is usable for determining a complex sense current of the capacitive sensor.

Various examples are directed to a frequency-compensated amplifier circuit comprising a first multi-stage amplifier comprising a first amplifier input node, a first amplifier output node, and a first amplifier intermediate node. A first feedback path between the first amplifier input node and the first amplifier output node comprises a feedback resistance. A second feedback path between the first amplifier output node and the first amplifier intermediate node comprises a first capacitor and a portion of the feedback resistance. A first switch circuit may be electrically coupled to the first capacitor and to the feedback resistance. The first switch circuit may have a first state in which the first capacitor is coupled to a first tap point of the feedback resistance and the portion of the feedback resistance has a first value. The first switch circuit may also have a second state in which the first capacitor is coupled to a second tap point of the feedback resistance and the portion of the feedback resistance has a second value different than the first value.

A transceiver that may be implemented in low-voltage differential signaling (LVDS) transmission system or a multipoint LVDS transmission system, and corresponding systems are disclosed herein. The transceiver can filter a common-mode component of a differential input signal input into the transceiver while maintaining a high impedance for a differential-mode component of the differential input signal. The transceiver utilizes teeter-totter circuitry to maintain the high impedance for the differential-mode component of the differential input signal.

Various examples are directed to amplifier circuits and methods for operating amplifier circuits. The amplifier circuit may comprise a first amplifier stage. The first amplifier stage comprises a first amplifier, a first feedback resistance, a second amplifier, a second feedback resistance, and a gain resistance. A first current source may be electrically coupled to provide a first current across the gain resistance in a first direction. A second current source may be electrically coupled to provide a second current across the gain resistance in a second direction opposite to the first direction.

The present disclosure provides a Multiple Inputs Multiple Ouputs RF front-end amplifier circuit, chip, and electronic device and a method for configuring signal path. The RF front-end amplifier circuit includes: at least two low-noise amplifying modules, each of which amplifies one voltage signal and converts into one or more intermediate current signals; a voltage output module, connected to each of the low-noise amplifying modules, for combining the intermediate current signal output by the low-noise amplifying module and converting them into one or more output voltage signals. The RF front-end amplifier circuit can be applied to an RF front-end with a Multiple Inputs Multiple Outputs structure.

This application relates to an active current compensation device which actively compensates for a noise occurring in a common mode in each of two or more high-current paths. In one aspect, the active current compensation device includes a sensing unit configured to generate an output signal corresponding to a common-mode noise current on each of the two or more high-current paths, and an amplification unit configured to amplify the output signal to generate an amplified current. The device may also include a compensation unit configured to generate a compensation current on the basis of the amplified current and allow the compensation current to flow to each of the two or more high-current paths, and a malfunction detection unit configured to detect a malfunction of the amplification unit. The malfunction detection unit and at least a portion of the amplification unit may be embedded in one integrated circuit (IC) chip.

Certain aspects of the present disclosure are generally directed to circuitry and techniques for current sensing. For example, certain aspects provide a circuit for signal amplification including a first amplifier, a second amplifier, and a third amplifier. The circuit also includes a first capacitive element coupled between a first output of the first amplifier and a first input of the third amplifier, a second capacitive element coupled between a second output of the first amplifier and a second input of the third amplifier, a third capacitive element coupled between a first output of the second amplifier and the first input of the third amplifier, and a fourth capacitive element coupled between a second output of the second amplifier and the second input of the third amplifier.