An operational amplifier comprises: a first amplifier stage 4 comprising a first differential pair of transistors 8, 10 arranged to receive and amplify a differential input signal 18, 20 thereby providing a first differential output signal 22, 24; and a second amplifier stage 6 comprising a second differential pair of transistors 26, 28 arranged to receive and amplify the first differential output signal 22, 24 thereby providing a second differential output signal 38, 40.

A continuous-time delta-sigma modulator, CTDSM (400, 500, 700, 800) is described that comprises: an operational transconductance amplifier, OTA, (406, 506, 706, 806) having an input port (404, 504, 719, 739, 819, 839) configured to receive an analog input signal and an output port (408, 508, 707, 708, 807, 808); an input low pass filter network comprising at least one input resistor, R1, (402, 502, 702, 722, 802, 822) at least one first shunt capacitor, C1, (403, 503, 703, 803) and at least one feedback resistor, Rdac (410, 510, 710, 810, 730, 830) connected to the input port of the OTA; an output filter network comprising a shunt second resistor, R2, (415, 515, 715, 815) in parallel to a second shunt capacitor, C2, (414, 514, 714, 814), and coupled to the output port (408, 508, 707, 708, 807, 808) of the OTA; a quantizer (413, 513, 713, 813) connected to the output filter network and having at least one output connected to the input port of the OTA via the at least one feedback resistor, Rdac; and wherein the input and output port of the OTA connected by a third feedforward-feedback capacitor, C3, (409, 509, 709, 729, 809, 829) arranged to provide a positive feedback around the OTA.

An amplifying circuit includes a reference voltage generating circuit, a common-mode voltage conversion circuit, a common-mode negative feedback circuit, and an amplifying sub-circuit. The reference voltage generating circuit generates a first reference voltage, a second reference voltage, and a reference common-mode voltage according to a post-stage common-mode voltage. The common-mode voltage conversion circuit converts the pre-stage output differential signal into a differential input signal according to the reference common-mode voltage. The common-mode negative feedback circuit generates a control voltage to quickly establish a common-mode negative feedback of the amplifying sub-circuit, wherein the first reference voltage and the second reference voltage are used to cancel a baseline signal of the pre-stage output differential signal. The amplifying circuit can eliminate the baseline signal, convert the common-mode voltage and quickly establish the common-mode negative feedback.

A driver circuit arrangement for driving a load and a differential drive arrangement thereof are provided. The driver circuit arrangement employs a dual feedback configuration with a feedback resistor and a current sensor feedback arrangement. The current sensor feedback arrangement provides a current feedback path from the amplifier output to the amplifier input, and has a current sensor resistor connected in an output current path of the driver circuit arrangement. A current feedback amplifier is present connected to the current sensor resistor and to the amplifier input.

A main amplifier generates an output signal S.sub.OUT according to a difference between first and second voltages VP and VN. A first gm amplifier is arranged as a differential input stage. A second, fully differential, gm amplifier amplifies a voltage difference between its non-inverting and inverting input terminals, and outputs a differential current signal I.sub.3N/I.sub.3P via its inverting and non-inverting output terminals. An integrator integrates a differential input current I.sub.4P/I.sub.4N input via its non-inverting and inverting input terminals, and samples and holds the signal every predetermined period, to generate a differential voltage signal. A first selector is arranged as an upstream stage of the second gm amplifier, and outputs the differential input signal without change or otherwise after swapping. A second selector is arranged as a downstream stage of the second gm amplifier, and outputs the signal I.sub.3N/I.sub.3P output from the second gm amplifier without change or otherwise after swapping.

A main amplifier generates an output signal S.sub.OUT according to a difference between first and second voltages VP and VN. A first gm amplifier is arranged as a differential input stage. A second, fully differential, gm amplifier amplifies a voltage difference between its non-inverting and inverting input terminals, and outputs a differential current signal I.sub.3N/I.sub.3P via its inverting and non-inverting output terminals. An integrator integrates a differential input current I.sub.4P/I.sub.4N input via its non-inverting and inverting input terminals, and samples and holds the signal every predetermined period, to generate a differential voltage signal. A first selector is arranged as an upstream stage of the second gm amplifier, and outputs the differential input signal without change or otherwise after swapping. A second selector is arranged as a downstream stage of the second gm amplifier, and outputs the signal I.sub.3N/I.sub.3P output from the second gm amplifier without change or otherwise after swapping.

Systems and methods for a variable-gain differentiator in series with at least two non-inverting amplifiers. The variable-gain differentiator is connected to a voltage-controlled source at its non-inverting input and to its output at its inverting input. The output is connected to the non-inverting input of the first non-inverting amplifier. The output of the first non-inverting amplifier is connected to the input of the second non-inverting amplifier. The output of the second non-inverting amplifier is connected to a series of three integrators. Each integrator is connected to its output by a feedback path.

A circuit includes an integrator circuit. The integrator circuit includes: an operational amplifier having an input terminal and an output terminal; a trimmable component having a first terminal, a second terminal, and a control terminal, the first terminal of the trimmable component coupled to the input terminal, and the second terminal of the trimmable component coupled to the output terminal; and a calibration control circuit having a first terminal and a second terminal, the first terminal of the calibration control circuit coupled to the output terminal, and the second terminal of the calibration control circuit coupled to the control terminal of the trimmable component.

Methods, apparatus, systems, and articles of manufacture are described to regulate an amplifier. An example apparatus includes an integrator, an input terminal of the integrator coupled to a terminal of a first resistor circuitry and an output terminal of the integrator coupled to a capacitor; an output stage, an input terminal of the output stage coupled to the output terminal of the integrator; second resistor circuitry, a first terminal of the second resistor circuitry coupled to the output terminal of the output stage, a second terminal of the second resistor circuitry coupled to the terminal of the first resistor circuitry and the input terminal of the integrator; and third resistor circuitry, a first terminal coupled to the terminal of the first resistor circuitry, the second terminal of the second resistor circuitry, and the input terminal of the integrator.

This application relates to sensing of signals with a common-mode variation. Embodiments describe a switching driver circuit with a modulator configured to control modulation of an output node between different switching voltages and a current sensor configured to sense a voltage drop across a sense resistor connected in series with the output node. The current sensor performs sensing during a first time window that occurs at regular intervals and the modulator avoids any transition in switching voltage at the first output node during the first time window. Embodiments also describe a sensing circuit for sensing a differential voltage with a common-mode variation which has a first sensing portion implemented to provide a floating voltage domain and a second sensing portion implemented to provide a static voltage domain. At least one switched capacitor provides a boundary between the voltage domains and is switched to transfer charge between the voltage domains.