An amplifier device includes an amplifier circuit, a feedback circuit, and a filter circuit. The amplifier circuit is configured to receive an input signal and a filtered signal, and to output a first output signal and a second output signal at a first output terminal and a second output terminal respectively. The first output signal and the second output signal are a pair of differential signals. The feedback circuit is configured to set direct current (DC) voltage levels of the first output signal and the second output signal to be at a predetermined voltage. The filter circuit is configured to low-pass filter the input signal or to low-pass filter the pair of differential signals so as to generate the filtered signal, and is configured to output the filtered signal to the amplifier circuit.

An amplifier device includes an amplifier circuit, a feedback circuit, and a filter circuit. The amplifier circuit is configured to receive an input signal and a filtered signal, and to output a first output signal and a second output signal at a first output terminal and a second output terminal respectively. The first output signal and the second output signal are a pair of differential signals. The feedback circuit is configured to set direct current (DC) voltage levels of the first output signal and the second output signal to be at a predetermined voltage. The filter circuit is configured to low-pass filter the input signal or to low-pass filter the pair of differential signals so as to generate the filtered signal, and is configured to output the filtered signal to the amplifier circuit.

According to an embodiment, an operational amplifier includes a first amplifier stage coupled between an input node and an intermediate node, a second amplifier stage coupled between the intermediate node and an output node, a compensation capacitor having a first terminal coupled to the intermediate node and a second terminal, and a compensation amplifier coupled between the output node and the second terminal. The compensation amplifier has a positive gain greater than one.

To accurately detect the presence or absence of a signal. A signal detector includes an input-signal amplifying circuit, a reference-signal amplifying circuit, and a comparator. In the signal detector, the input-signal amplifying circuit amplifies an input signal with a predetermined gain. The reference-signal amplifying circuit amplifies a reference signal at a constant signal-level with a gain that substantially matches the predetermined gain. The comparator compares a signal level of the amplified input signal with a signal level of the amplified reference signal, and outputs the comparison result as a detection signal.

A signal amplification method includes receiving, from a capacitive sensor, a first input signal by a first control terminal of a first transistor, and a second input signal by a first control terminal of a second transistor. The method also includes producing a first output signal, including amplifying a first signal at a first load path terminal of the first transistor using a first inverting amplifier having an output coupled to a resistance network, and producing a second output signal, including amplifying a second signal at a first load path terminal of the second transistor using a second inverting amplifier having an output coupled to the resistance network. The method also includes feeding back the first and second output signal to a second load path terminal of the first transistor and to a second load path terminal of the second transistor via the resistance network according to a pre-determined fraction.

An implementation of an operational amplifier circuit includes a first stage amplifier circuit, a second stage amplifier circuit and a first feedforward circuit. The first stage amplifier circuit is coupled to a first input node for receiving a first input signal and amplifying the first input signal to generate a first amplified signal. The second stage amplifier circuit is coupled to the first stage amplifier circuit for receiving the first amplified signal and amplifying the first amplified signal to generate a first output signal at a first output node. The first feedforward circuit is coupled between the first input node and the second stage amplifier circuit for feeding the first input signal forward to the second stage amplifier circuit.

An apparatus includes: a first transconductance device of a first type configured to convert a first voltage into a first current of an output node; a second transconductance device of a second type configured to convert a second voltage into a second current of the output node; a common mode feedback circuit coupled to the output node configured to control a mean voltage at the output node in accordance with a reference voltage; and a reset circuit configured to reset a voltage at the output node in accordance with a clock signal.

Disclosed are systems implementing an implicit Feed-Forward Compensated (FFC) op-amp, where the main FFC port is realized by the P-side of the CMOS input structure of the 2nd and 3rd stages of the op-amp, while the main signal path is through the N-side. According to some embodiments, to balance the relative strengths of the main path and feed-forward paths, the 2nd-stage NMOS input pair is split into two pairs, one is used to route the main path while the other is used for auxiliary FFC. The disclosed implicit FCC op-amp is unconditionally stable with adequate phase lead. According to some embodiments, the disclosed op-amp, which may be a wide-band op-amp, can be used in highly linear applications operative at intermediate frequency (IF), such as signal buffers for high-performance data converters or radio-frequency (RF) modulators and demodulators, continuous-time (CT) filters or sigma-delta data converters.

A self-bias signal generating circuit includes a differential amplifier circuit including a current source transistor. The differential amplifier circuit is configured to amplify at least a pair of differential input signals to generate at least a pair of differential output signals, and the differential amplifier circuit is configured to generate an output common-mode signal based on the at least a pair of differential output signals. The self-bias signal generating circuit includes a feedback loop circuit configured to adjust a voltage level of the output common-mode signal to generate a self-bias signal, and the feedback loop circuit is configured to provide the self-bias signal to the differential amplifier circuit. The self-bias signal is applied to a gate terminal of the current source transistor.