H03F2203/45228

POWER AMPLIFIER RAMPING AND POWER CONTROL WITH FORWARD AND REVERSE BACK-GATE BIAS
20180302038 · 2018-10-18 ·

Embodiments of the present disclosure provide a circuit structure and method for power amplifier control with forward and reverse voltage biases to transistor back-gate regions. A circuit structure according to the disclosure can include: a power amplifier (PA) circuit having first and second transistors, the first and second transistors each including a back-gate region, wherein the back-gate region of each of the first and second transistors is positioned within a doped substrate separated from a semiconductor region by a buried insulator layer; and an analog voltage source coupled to the back-gate regions of the first and second transistors of the PA circuit, such that the analog voltage source alternatively supplies a forward bias voltage or a reverse bias voltage to the back-gate regions of the first and second transistors of the PA circuit to produce a continuously sloped power ramping profile.

Balanced distributed power amplifier for monolithic microwave integrated circuit

An apparatus includes an input transformer, an amplifier and an output transformer. The input transformer may be on a substrate and configured to convert an input signal into a differential input signal. The input signal may be a radio-frequency signal. The amplifier may be on the substrate and configured to generate a differential output signal in response to the differential input signal. The amplifier may be a balanced and distributed amplifier. The output transformer may be on the substrate and configured to convert the differential output signal into an output signal. Each of the input transformer and the output transformer may be a three line coupled balun transformer with a variable bandpass bandwidth.

Fully depleted silicon on insulator power amplifier

The present disclosure generally relates to semiconductor structures and, more particularly, to a fully depleted silicon on insulator power amplifier with unique biases and voltage standing wave ratio protection and methods of manufacture. The structure includes a pseudo-differential common source amplifier; first stage cascode devices connected to the pseudo-differential common source amplifier and protecting the pseudo-differential common source amplifier from an over stress; second stage cascode devices connected to the first stage cascode devices and providing differential outputs; and at least one loop receiving the differential outputs from the second stage cascode devices and feeding back the differential outputs to the second stage cascode devices.

Switched inductor/transformer for dual-band low-noise amplifier (LNA)

Certain aspects of the present disclosure generally relate to an amplifier configured to process signals received in different frequency bands, where at least a portion of the amplifier is shared between different modes corresponding to the different frequency bands. One example circuit generally includes an amplifier having at least one first transistor configured to amplify a first signal received in a first mode of operation (e.g., associated with a particular frequency band), and at least one second transistor configured to amplify a second signal received in a second mode of operation. The amplifier may also include a transformer comprising a primary winding and a secondary winding, and one or more switches configured to selectively couple the primary winding to the first transistor or the second transistor based on the first mode or the second mode of operation, respectively. In certain aspects, the transformer may be coupled to a transconductance circuit.

FULLY DEPLETED SILICON ON INSULATOR POWER AMPLIFIER
20180167038 · 2018-06-14 ·

The present disclosure generally relates to semiconductor structures and, more particularly, to a fully depleted silicon on insulator power amplifier with unique biases and voltage standing wave ratio protection and methods of manufacture. The structure includes a pseudo-differential common source amplifier; first stage cascode devices connected to the pseudo-differential common source amplifier and protecting the pseudo-differential common source amplifier from an over stress; second stage cascode devices connected to the first stage cascode devices and providing differential outputs; and at least one loop receiving the differential outputs from the second stage cascode devices and feeding back the differential outputs to the second stage cascode devices.

Low power high speed interface
09979188 · 2018-05-22 · ·

An interface for inter-chip communication, comprises a transmitter part (TX) for transmitting a differential signal and a receiver part (RX) for receiving the differential signal, the transmitter part (TX) being provided in a first integrated circuit chip (CHIP A) and the receiver part (RX) being provided in a second integrated circuit chip (CHIP B). The transmitter part (TX) comprises a first transistor (Tx1) and a second transistor (Tx2) arranged in a common source configuration, and the receiver part (RX) comprises a third transistor (TR1) and a fourth transistor (TR2) arranged in a common gate configuration. Current flowing in the receiver part (RX) also flows through the transmitter part (TX).

Push-pull amplifier, corresponding apparatus and method
09948253 · 2018-04-17 · ·

A push-pull amplifier includes a pair of active devices driving the primary side of a double distributed active transformer (DDAT). The primary side of the DDAT includes a cascaded arrangement of primary windings of a first set of transformers with the active devices coupled ends of cascaded arrangement of primary windings. The secondary side of the DDAT includes a cascaded arrangement of secondary windings of a second set of transformers coupled to a load. Secondary windings of the first set of transformers drive inputs of respective active stages. Outputs of the active stages drive respective primary windings of the second set of transformers.

Low Power High Speed Interface
20180076618 · 2018-03-15 ·

An interface for inter-chip communication, comprises a transmitter part (TX) for transmitting a differential signal and a receiver part (RX) for receiving the differential signal, the transmitter part (TX) being provided in a first integrated circuit chip (CHIP A) and the receiver part (RX) being provided in a second integrated circuit chip (CHIP B). The transmitter part (TX) comprises a first transistor (Tx1) and a second transistor (Tx2) arranged in a common source configuration, and the receiver part (RX) comprises a third transistor (TR1) and a fourth transistor (TR2) arranged in a common gate configuration. Current flowing in the receiver part (RX) also flows through the transmitter part (TX).

SYSTEMS AND METHODS FOR A SWITCHLESS RADIO FRONT END
20180041243 · 2018-02-08 ·

A radio circuit, comprises an antenna; a differential power amplifier, comprising differential transmit inputs and differential transmit outputs, configured to amplify differential transmit signals received via the differential transmit inputs and output the amplified differential transmit signals via the differential transmit outputs; a differential low noise amplifier, comprising differential receive inputs and differential receive outputs, configured to receive differential receive signals via the differential receive inputs and output amplified differential receive signals via the differential receive outputs; and a transformer comprising a primary winding and a secondary winding, the primary winding coupled with the differential transmit outputs of the power amplifier and the differential receive inputs of the low noise amplifier and the secondary winding coupled with the antenna.

Matching network for load line change
09882588 · 2018-01-30 · ·

An amplifier circuit that includes a first power amplifier configured to drive a load and a second power amplifier configured to drive the load through an impedance step-up network. The impedance step-up network is connected to an output of the second power amplifier. The impedance step-up network is configured to switch into a first mode to present an increased impedance to the first power amplifier, and switch into a second mode in which the impedance step-up network steps-up an impedance seen by the second power amplifier looking into the impedance step-up network.