A differential pair circuit includes a first branch and a second branch having a common first node. Each of the first and second branches includes at least one transistor having a conduction node directly connected to the common first node. A third branch couples the common first node to a power supply node. The third branch includes a current source in series with a resistive element.

Disclosed is a reconfigurable amplifier and an amplification method thereof, the amplifier includes an input selector, a first amplifying circuit, and a second amplifying circuit. The input selector is configured to select one of a voltage input and a current input based on a voltage measurement mode and a current measurement mode. The first amplifying circuit includes a first load element, and is configured to apply a voltage corresponding to the voltage input to the first load element in the voltage measurement mode and receive the current input in the current measurement mode and block a current flowing through the first load element. The second amplifying circuit is configured to mirror a current flowing through the first amplifying circuit in response to one of the voltage input and the current input and generate an output voltage based on the mirrored current.

A power amplifier includes a two-dimensional matrix of NM active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately NM the output power of each of the active cells.

A wideband highly-linear buffer circuit exhibiting a low output impedance comprises a first PFET (PFET1), a second PFET (PFET2), a first NFET (NFET1), and a second NFET (NFET2). Sources of PFET1 and PFET2 are coupled to VDD. PFET1's drain is coupled to an output lead. PFET2 acts as a current source. NFET1's drain is coupled to PFET2's drain and to PFET1's gate. NFET1's source is coupled to the output lead. NFET2's source is coupled to ground. NFET2's drain is coupled to NFET1's source and to the output lead. NFET1's gate is AC coupled to a first input lead. In a single-ended input example, NFET2's gate is AC coupled NFET1's drain. In a differential input example, NFET2's gate is AC coupled to a second input lead. In another differential input example, PFET2 is not just a current source, but rather PFET2's gate is AC coupled to the first input lead.