H03F2203/45288

Measuring current generation circuit

A measuring current generation circuit coupled to a setting resistor is disclosed. The generation circuit includes a first measuring terminal, a second measuring terminal, a first transconductance amplifier, a second transconductance amplifier and an output circuit. The first transconductance amplifier has a first input terminal and a second input terminal. The first input terminal is coupled to one terminal of the setting resistor. The second input terminal is coupled to another terminal of the setting resistor and coupled to the first measuring terminal. The second transconductance amplifier has a third input terminal and a fourth input terminal. The output circuit is coupled to output terminals of the first transconductance amplifier and the second transconductance amplifier respectively and has a first output terminal and a second output terminal. The first output terminal is coupled to the first input terminal. The second output terminal is coupled to the second measuring terminal.

Multichannel ultra-low noise amplifier

The present disclose generally relates to a multichannel low-noise amplifier. At each input to the multichannel low-noise amplifiers, a plurality of transistors can be connected in parallel. This parallel connection decreases the voltage noise beyond what is possible using a single input transistor at each input. As an additional benefit, the initial operating region of the input transistors is not changed. The multichannel low-noise amplifier can be incorporated on a single integrated circuit chip to amplify biological signals to facilitate selective recording of a property (e.g., amplifying neural signals to facilitate selective recording of neural activity).

OUTPUT POLE-COMPENSATED OPERATIONAL AMPLIFIER
20210250006 · 2021-08-12 ·

A circuit includes a first transconductance stage having an output. The circuit further includes an output transconductance stage, and a first source-degenerated transistor having a first control input and first and second current terminals. The first control input is coupled to the output of the first transconductance stage. The circuit also includes a second transistor having a second control input and third and fourth current terminals. The third current terminal is coupled to the second current terminal and to the output transconductance stage.

Microphone assembly with reduced noise

A microphone assembly comprising: a housing including a base, a cover, and a sound port; a MEMS transducer element disposed in the housing, the transducer element configured to convert sound into a microphone signal voltage at a transducer output; and a processing circuit. The processing circuit comprising a transconductance amplifier comprising an input node connected to the transducer output for receipt of the microphone signal voltage, the transconductance amplifier being configured to generate an amplified current signal representative of the microphone signal voltage in accordance with a predetermined transconductance of the transconductance amplifier; and an analog-to-digital converter comprising an input node connected to receive the amplified current signal, said analog-to-digital converter being configured to sample and quantize the amplified current signal to generate a corresponding digital microphone signal.

SWITCHING CONVERTER WITH ADAPTIVE COMPENSATION

A switching converter includes a voltage conversion circuit providing an output voltage from an input voltage and a PWM voltage generated in response to first and second oscillating voltages. The input stage of a transconductor circuit provides an input reference current following a difference between a reference voltage and a voltage dependent on the output voltage and according to a transconductance, and an output stage for providing an output reference current from the input reference current. A phase shifter shifts an oscillating reference voltage according to the output reference current to obtain the first and second oscillating voltages. The transconductance is controlled in response to the input voltage resulting in a change of the input reference current. Compensation for that change is provided by subtracting a variable compensation current from the input reference current, where the variable compensation current is generated in response to the input voltage.

Circuits and Methods for Maintaining Gain for a Continuous-Time Linear Equalizer
20210175868 · 2021-06-10 ·

A bias structure includes a reference voltage node connected to gate structures of a first NMOS transistor and a second NMOS transistor, a bias voltage node comprising a bias voltage, and a first op amp having a first input connected to the reference voltage, a second input connected to a drain of the first NMOS transistor, and an output connected to gate structures of a first PMOS transistor and a second PMOS transistor. The bias structure further includes a second op amp having a first input connected to the reference voltage, a second input connected to a drain of the second NMOS transistor, and an output connected to a gate structure of a third NMOS transistor and the bias voltage node. The first NMOS transistor matches a transistor of a differential pair of an integrated circuit device.

Systems and methods for reducing switching loss in power conversion systems

Power converter and method thereof according to certain embodiments. For example, the power converter includes a primary winding, and a secondary winding coupled to the primary winding. Additionally, the power converter includes a first switch including a first switch terminal, a second switch terminal, and a third switch terminal. The first switch is configured to affect a first current associated with the primary winding. The first switch terminal corresponds to a first voltage, and the second switch terminal corresponds to a second voltage. The first voltage minus the second voltage is equal to a voltage difference. Moreover, the power converter includes a second switch including a fourth switch terminal, a fifth switch terminal, and a sixth switch terminal and configured to affect a second current associated with the secondary winding.

Output pole-compensated operational amplifier

A circuit includes a first transconductance stage having an output. The circuit further includes an output transconductance stage, and a first source-degenerated transistor having a first control input and first and second current terminals. The first control input is coupled to the output of the first transconductance stage. The circuit also includes a second transistor having a second control input and third and fourth current terminals. The third current terminal is coupled to the second current terminal and to the output transconductance stage.

Current amplifier

A first transistor, a second transistor, a third transistor, and a fourth transistor, their source terminals being grounded, are provided. Further, a first feedback circuit connected between a gate terminal and a drain terminal in the first transistor, and having first impedance, a second feedback circuit connected between a gate terminal and a drain terminal in the second transistor, and having the first impedance, a current source for outputting a current, a first load circuit connected between the drain terminal of the first transistor and a first output terminal of the current source, and having second impedance, and a second load circuit connected between the drain terminal of the second transistor and a second output terminal of the current source, and having the second impedance are provided.

Analog-digital converter, solid-state imaging element, and electronic equipment

Included are a loop filter, a quantization circuit section, and a current steering digital-analog conversion section. The quantization circuit section converts a loop filter output into a digital value. The current steering digital-analog conversion section is provided in a feedback loop that feeds back the output of the quantization circuit section to the loop filter. Then, each of the analog-digital converters includes a first input signal current path, a second input signal current path, a first feedback current path, and a second feedback current path. The first input signal current path feeds a first input signal current to an input end of a first stage integrator of the loop filter. The second input signal current path feeds a second input signal current, a current opposite in sign to the first input signal current, to an input end of a second stage integrator of the loop filter. The first feedback current path connects one feedback output end of the current steering digital-analog conversion section to the input end of the first stage integrator of the loop filter. The second feedback current path connects other feedback output end of the current steering digital-analog conversion section to the input end of the second stage integrator of the loop filter.