Disclosed is a 5G (5.sup.th generation) or pre-5G communication system for supporting a data transmission rate higher than that of a 4G (4.sup.th generation) communication system such as long-term evolution (LTE). A transmission device comprises: a first amplification unit having a common source structure, including cross coupled capacitors, and amplifying an input signal; a second amplification unit, having a common gate structure, for amplifying a signal output from the first amplification unit; and a first removal unit which is connected to output terminals of the first amplification unit and input terminals of the second amplification unit and which removes at least one portion of second harmonics. The first removal unit can offset, with respect to a fundamental frequency, at least some of parasitic capacitance generated from the output terminals of the first amplification unit and the input terminals of the second amplification unit, and can ground a signal having a secondary harmonic frequency with respect to the secondary harmonic frequency.

A method and apparatus for correcting baseline wander is disclosed. The method and apparatus may include generating filtered signals by filtering input signals using a filter circuit. An equalizer circuit using the filtered signals may generate output signals. Feedback networks may be configured to couple a respective output signal to a corresponding filtered signal.

Techniques for providing a modulation driver signal are disclosed. In an example, a modulation driver can include a first transistor configured to receive a first input signal having a first voltage swing, a second transistor coupled in series with the first transistor, and a third transistor configured to limit a third voltage swing across the second transistor. The second transistor can be configured to provide a representation of the first input signal as a first output signal of the modulator driver. The first output signal can have a second voltage swing greater than the first voltage swing.

The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input and generates a first load current. A first output node is coupled to a power supply through a first load resistor. The first load resistor receives the first load current. A first capacitor network is coupled to the first output node and draws a first capacitive current from the first output node. A first current buffer is coupled between the first output node and the first transistor. A current through the first current buffer is a summation of the first load current and the first capacitive current.

Techniques for monitoring a distortion signal of a power amplifier circuit, where the output of a distortion monitoring circuit includes little or no fundamental signal and closely represents the actual distortion of the amplifier circuit of a wired communications system. The power amplifier circuit can generate a distortion feedback signal that does not affect the power amplifier's output power capability, e.g., no inherent loss in the fundamental output of the amplifier. That is, using a distortion monitor circuit, the power amplifier circuit can resolve a distortion feedback signal from the intended output signal of the output power amplifier circuit.

The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input and generates a first load current. A first output node is coupled to a power supply through a first load resistor. The first load resistor receives the first load current. A first capacitor network is coupled to the first output node and draws a first capacitive current from the first output node. A first current buffer is coupled between the first output node and the first transistor. A current through the first current buffer is a summation of the first load current and the first capacitive current.

An integrated circuit includes a first high-pass filter having an input coupled to receive a first signal and an output coupled to a first input of a first differential pair of transistors. A second high-pass filter includes an input coupled to receive a second signal and an output coupled to a second input of the first differential pair of transistors. The second signal may be a complementary signal of the first signal. A second differential pair of transistors includes control electrodes coupled to a first voltage supply terminal. A boost circuit is coupled between the second differential pair of transistors and the first voltage supply terminal. A low-pass filter is coupled between the first differential pair of transistors and the second differential pair of transistors.

The present invention provides a class AB amplifier, wherein the class AB amplifier includes a cascode stage with a filter and an output stage. The cascode stage with the filter is arranged for receiving an input signal to generate a first driving signal and a second driving signal, wherein the filter filters the input signal to generate an filtered input signal, and at least one of the first driving signal and the second driving signal is generated according to the filtered input signal. The output stage is coupled to the cascode stage, and is arranged for generating an output signal according to the first driving signal and the second driving signal.

The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input and generates a first load current. A first output node is coupled to a power supply through a first load resistor. The first load resistor receives the first load current. A first capacitor network is coupled to the first output node and draws a first capacitive current from the first output node. A first current buffer is coupled between the first output node and the first transistor. A current through the first current buffer is a summation of the first load current and the first capacitive current.

An amplifier for converting a differential input signal to a single ended output signal. In particular, the amplifier including a converting circuit for converting a differential input signal into a single ended output signal, the converting circuit including an input section for receiving the differential input signal and an output section including an output port for providing the single ended output signal, where the output section includes a capacitive element configured to reduce an intrinsic time constant of the converting circuit.