H03F2203/45392

Photodetector circuit

In accordance with aspects of the present invention, embodiments of a photodiode circuit. A photodiode circuit according to some embodiments includes a transimpedance amplifier; a resistor coupled across the transimpedance amplifier; and an amplifier stage coupled to receive an output from the transimpedance amplifier, wherein the photodiode circuit provides dynamic range across a current range of the photodiode circuit. In some embodiments, the transimpedance amplifier includes a receive signal strength indicator that provides a DC current signal to a tail of a first amplifier stage, the tail providing a current that is adaptively related to the DC current. In some embodiments, the resistor is a shielded resistor. In some embodiments, the adaptive current sink includes a plurality of switchable parallel current sinks.

LINEAR BROADBAND TRANSCONDUCTANCE AMPLIFIER
20210104988 · 2021-04-08 ·

An amplifier circuit comprises a differential input stage and a differential output stage. The differential input stage includes a first differential input transistor pair coupled to a differential input of the amplifier circuit, and a second differential input transistor pair coupled to the differential input and the differential output stage; a degeneration impedance coupled between first transistors of the first and second differential input transistor pairs and second transistors of the first and second differential input transistor pairs; and a feedback circuit coupled to the first and second differential input transistor pairs and the degeneration impedance, wherein output current is provided from the differential input stage to the differential output stage by the feedback circuit and transition current is provided to the output stage by the second differential input transistor pair.

Power efficient amplifier

A power efficient (PE) amplifier includes a cascode amplifier, a transistor amplifier, and a voltage supply. The transistor amplifier includes at least one differential pair of transistors and a plurality of transformers having a primary winding and a tapped secondary winding. The secondary winding is connected across emitters or sources of each transistor pair. The tap of each secondary has a current source. The primary windings of the plurality of transformers are connected in series. The transistor bases or gates are alternating current (AC) grounded. The collector or drain terminal pairs are connected in parallel. The voltage supply is low voltage and supplies a current to the cascode amplifier. The PE amplifier further includes a plurality of current sources which provide a total current to the transistor amplifier. The PE amplifier has, among other things, improved power gain, improved reverse isolation, improved power dissipation, and improved peak differential swing.

OPTICAL RECEIVER AND TRANSIMPEDANCE AMPLIFIER CIRCUIT

An optical receiver disclosed includes a bias terminal, an input terminal, a photodiode, an amplifier circuit, a first resistor, a bypass circuit, a filter circuit, and a control circuit. The photodiode receives a bias from the filter circuit through the bias terminal, and outputs a current signal to the amplifier circuit through the input terminal. The amplifier circuit converts an input current to an output voltage. The bypass circuit electrically connected to the input terminal decreases a first input impedance viewed from the input terminal, when activated, and increases the first input impedance, when deactivated. The filter circuit increases a second input impedance viewed from the bias terminal, when a dumping function thereof is activated, and decreases the second input impedance, when the dumping function is deactivated. The control circuit activates the dumping function and the bypass circuit, when the output voltage is larger than a certain voltage.

TRANSIMPEDANCE AMPLIFIER CIRCUIT

A transimpedance amplifier (TIA) circuit disclosed includes an input terminal, a first TIA circuit, a second TIA circuit, a field effect transistor (FET), and a gain control circuit. The first TIA circuit outputs a voltage signal from a first output in accordance with an input current received at a first input electrically connected to the input terminal. The second TIA circuit outputs a reference signal from a second output. The FET varies a resistance between a first current terminal and a second current terminal in accordance with a control signal applied to a control terminal. The first current terminal is electrically connected to the input terminal. The second current terminal is electrically connected to the second output of the second TIA circuit. The gain control circuit detects an amplitude of the voltage signal and generates the control signal according to a detection result of the amplitude.

Fully Differential Rail-to-Rail Output Amplifier with Inverter-Based Input Pair
20210013851 · 2021-01-14 ·

A fully differential rail-to-rail-output amplifier includes a differential input inverter pair, folded cascode pair, class AB control pair, and class AB output rail-to-rail pair. A drain associated with the folded cascode pair is operatively coupled to the class AB control pair, and the drain associated with the folded cascode pair is unconnected to the current source associated with the class AB control pair. A method of providing fully differential rail-to-rail-output amplification includes coupling a folded cascode pair operatively to a differential input inverter pair, coupling a drain associated with the folded cascode pair operatively to a class AB control pair, and coupling a class AB output rail-to-rail pair operatively to the class AB control pair.

POWER EFFICIENT AMPLIFIER

A power efficient (PE) amplifier includes a cascode amplifier, a transistor amplifier, and a voltage supply. The transistor amplifier includes at least one differential pair of transistors and a plurality of transformers having a primary winding and a tapped secondary winding. The secondary winding is connected across emitters or sources of each transistor pair. The tap of each secondary has a current source. The primary windings of the plurality of transformers are connected in series. The transistor bases or gates are alternating current (AC) grounded. The collector or drain terminal pairs are connected in parallel. The voltage supply is low voltage and supplies a current to the cascode amplifier. The PE amplifier further includes a plurality of current sources which provide a total current to the transistor amplifier. The PE amplifier has, among other things, improved power gain, improved reverse isolation, improved power dissipation, and improved peak differential swing.

CMOS input stage circuits and related methods

Embodiments of improved CMOS input stage circuits and related methods are provided herein to maintain a near constant transconductance across an entire common-mode input voltage range of the input stage. One embodiment includes a pair of NMOS input transistors and a pair of PMOS input transistors, each coupled to receive a differential input voltages at their gate terminals; a current source coupled to source terminals of the pair of PMOS input transistors and configured to generate a current; a current steering circuit configured to steer the current to the pair of NMOS input transistors and/or to the pair of PMOS input transistors, depending on whether a common mode input voltage (CMV) is greater than, less than, or substantially equal to a cross-over voltage; and a current stealing circuit configured to reduce the current when the CMV is substantially equal to the cross-over voltage.

CMOS Input Stage Circuits And Related Methods
20200389140 · 2020-12-10 ·

Embodiments of improved CMOS input stage circuits and related methods are provided herein to maintain a near constant transconductance across an entire common-mode input voltage range of the input stage. One embodiment includes a pair of NMOS input transistors and a pair of PMOS input transistors, each coupled to receive a differential input voltages at their gate terminals; a current source coupled to source terminals of the pair of PMOS input transistors and configured to generate a current; a current steering circuit configured to steer the current to the pair of NMOS input transistors and/or to the pair of PMOS input transistors, depending on whether a common mode input voltage (CMV) is greater than, less than, or substantially equal to a cross-over voltage; and a current stealing circuit configured to reduce the current when the CMV is substantially equal to the cross-over voltage.

Bias modulation active linearization for broadband amplifiers
10848109 · 2020-11-24 · ·

A power amplifier circuit for broadband data communication over a path in a communication network can reduce or avoid gain compression, provide low distortion amplification performance, and can accommodate a wider input signal amplitude range. A dynamic variable bias current circuit can be coupled to a differential pair of transistors to provide a dynamic variable bias current thereto as a function of input signal amplitude. Bias current is increased when input signal amplitude exceeds a threshold voltage established by an offset or level-shifting circuit. The frequency response of the bias current circuit can track the full frequency content of the input signal, rather than its envelope. Gain degeneration can be modulated in concert with the bias current modulation to stabilize amplifier gain.