A post driver includes an input pair circuit, a protection circuit, a common mode sensing circuit and an amplifier. The input pair circuit outputs a first signal through a first node and outputs a second signal through a second node according to a first input signal and a second input signal. The protection circuit provides the input pair circuit with voltage protection according to multiple first bias voltages and a second bias voltage, transmits the first signal to a first load to generate a first output signal, and transmits the second signal to a second load to generate a second output signal. The common mode sensing circuit senses a level of the first node and a level of the second node to generate a feedback signal. The amplifier generates the second bias voltage according to a reference signal and the feedback signal.

The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a line driver with transistors directly coupled to the ground, and a bias voltage is coupled common mode resistors of the line driver. There are other embodiments as well.

A differential amplifier comprises: a long tailed pair transistor configuration comprising a differential pair of transistors and a tail transistor; and a replica circuit configured to vary a feedback current in the replica circuit to match a replica voltage to a reference voltage, wherein varying the feedback current in the replica circuit 4 provides a bias voltage to the tail transistor in the long tailed pair which controls a tail current through the tail transistor to determine a common mode voltage in the long tailed pair.

An operational amplifier comprises: a first amplifier stage 4 comprising a first differential pair of transistors 8, 10 arranged to receive and amplify a differential input signal 18, 20 thereby providing a first differential output signal 22, 24; and a second amplifier stage 6 comprising a second differential pair of transistors 26, 28 arranged to receive and amplify the first differential output signal 22, 24 thereby providing a second differential output signal 38, 40.

A differential interface circuit includes a differential amplifier circuit, a common-mode feedback circuit and a feedback initialization circuit. The differential amplifier circuit is configured to receive and amplify a differential input signal so as to produce an amplified differential output signal. The common-mode feedback circuit is configured to estimate a common-mode level of the differential output signal, to produce a feedback value in response to the estimated common-mode level, and to adjust the differential amplifier circuit using the feedback value. The feedback initialization circuit is configured, in response to detecting that the differential input signal is in a range predefined as abnormal, to temporarily override the common-mode feedback circuit, and instead set the feedback value applied to the differential amplifier circuit to a predefined initialization value.

A fully differential amplifier includes: an input stage comprising a first amplification circuit and a second amplification circuit, one of which is configured to generate a push signal and the other of which is configured to generate a pull signal, each by amplifying a differential input signal; an output stage for generating a differential output signal based on the push signal and the pull signal; and a feedback circuit for providing common mode feedback to the first amplification circuit based on the differential output signal, wherein the second amplification circuit may include a passive network for setting a common mode voltage of the push signal or the pull signal.

A precharge circuit comprises a gain amplifier, a comparator, a reservoir capacitor, a switch, a current source, and a switching network. The gain amplifier has a gain G1 and receives an input voltage Vrefp. The gain amplifier outputs an amplified voltage G1Vrefp to the comparator, which compares G1Vrefp to a voltage across the reservoir capacitor. The comparator outputs a control signal for the switch based on the comparison. The switch couples the current source to the reservoir capacitor. The current from the current source charges the reservoir capacitor. The switching network couples the reservoir capacitor to an output of the precharge circuit during a first operating mode and provides the input voltage Vrefp to the output during a second operating mode.

A chopper amplifier and method of operation are described. The chopper amplifier comprises a first chopper arranged to modulate an input signal using a first chopper signal having a chopper frequency. An amplification stage has an input arranged to receive the chopped signal and an output, and supplies an amplified signal at the output. An output chopper is arranged to integrate the amplified signal using a second chopper signal having the chopper frequency to generate an amplified output signal. The amplification stage is further configured to filter the chopped signal to attenuate signal components having frequencies lower than the chopper frequency.

A transconductor circuitry (10) with adaptive biasing comprises a first input terminal (ElOa) to apply a first input signal (inp), and a second input terminal (ElOb) to apply a second input signal (inn). A control circuit (200) is configured to control a first controllable current source (110) in a first current path (101) and a second controllable current source (120) in a second current path (102) in response to at least one of a first potential of a first node (N1) of the first current path (101) and a second potential of a second node (N2) of the second current path (102). The first node (N1) is located between a first transistor (150) and the first controllable current source (110), and the second node (N2) is located between a second transistor (160) and the second controllable current source (120).

A semiconductor device includes a differential amplification circuit that outputs differential output signals Vo1 and Vo2, external output terminals PD1 and PD2 to which one of the differential output signals Vo1 and Vo2 and single end signals Vo3 and Vo4 is selectively supplied, switch units SW1 and SW2 that control a conduction state between the external output terminal PD1 and the feedback line and a conduction state between the external output terminal PD2 and the feedback line, respectively, resistance elements R1 and R2 respectively provided in series with the switch units SW1 and SW2, a CMFB circuit that controls a common mode voltage of the differential amplification circuit according to a difference between an intermediate voltage Vcm of the external output terminals PD1 and PD2 in the feedback line and a reference voltage Vref, and a switch unit SW3 that controls to supply a clamp voltage to the feedback line.