Patent classifications
H03F2203/45481
Operational Amplifier, Driving Interface, Measurement and Control Device, Driving Circuit and Driver
An operational amplifier, a driving interface, a measurement and control device, a driving circuit and a driver are provided. The operational amplifier is used as at least one of an input interface and output interface, and when the operational amplifier corresponds to one transistor (Q), an external circuit of the transistor further includes: a first port (Vdj), connected with a base (B) of the transistor (Q) through a first resistor (Rb); a second port (I/Oe), connected with an emitter of the transistor (Q); a third port (I/Oc), connected with a collector (C) of the transistor (Q); and a fourth port (GND), connected with the emitter (E) of the transistor (Q) through a second resistor and used as a public port for signal input and signal output.
Low power supply voltage double-conversion radio frequency receiving front end
The present invention discloses a low power supply voltage double-conversion radio frequency receiving front end, which can work at a lower power supply voltage in a passive frequency conversion mode; a first frequency conversion unit and a second frequency conversion unit of the front end are directly cascaded, and a second orthogonal passive frequency conversion shifts a low input impedance of a transimpedance amplifier to an intermediate frequency, so as to construct a band-pass filtering function for radio frequency current; and the radio frequency current which has undergone two frequency conversions is converted into an output intermediate frequency voltage via the transimpedance amplifier. Compared with the traditional active+active or active+passive double conversion mode, the present invention omits intermediate-stage active circuits and filtering circuits, thereby saving power consumption and layout area, and realizing sufficient rejection on an image signal while ensuring a high conversion gain.
MODULATED SUPPLY AMPLIFIER WITH ADJUSTABLE INPUT PARAMETER CONFIGURATION
An amplifier may include control circuitry that may track a first input signal parameter and, in response, adjust a value of a second input parameter. Input parameter tracking and adjustment may facilitate control of output parameters for the amplifier. For example, an envelope-tracking amplifier may track input signal amplitude and adjust other input parameters in response. The adjustments may facilitate control of output parameters, such as gain or efficiency. The amplifier may further include calibration circuitry to determine adjustment responses to various tracked input parameters.
Variable-gain amplifier and phased array system
A variable-gain amplifier and a phased array system are provided. A variable-gain amplifier includes a cascode circuit comprising a first amplification transistor and a second amplification transistor array that are cascaded, the second amplification transistor array comprising a plurality of second amplification transistors connected in parallel and configured to output an adjustable current to an output matching network, the first amplification transistor is a common-source transistor, the plurality of second amplification transistors are common-gate transistors, or the cascode circuit is a common-emitter common-base circuit, the first amplification transistor is a common-emitter amplification circuit, and the second amplification transistor array is a common-base amplification circuit. The variable-gain amplifier further including a variable capacitor circuit coupled to the second amplification transistor array and coupled to the output matching network at first nodes.
Active Device Which has a High Breakdown Voltage, is Memory-Less, Traps Even Harmonic Signals and Circuits Used Therewith
An active device and circuits utilised therewith are disclosed. In an aspect the active device comprises an n-type transistor having a drain, gate and bulk and a p-type transistor having a drain, gate and bulk. The n-type transistor and the p-type transistor include a common source. The device includes a first capacitor coupled between the gate of the n-type transistor and the gale of the p-type transistor, a second capacitor coupled between the drain of the n-type transistor and the drain of p-type transistor and a third capacitor coupled between the bulk of the n-type transistor and the bulk of p-type transistor. The active device has a high breakdown voltage, is memory less and traps even harmonic signals.
RF transceiver and RF transmitter of the same
An RF transmitter with a power combiner and a differential amplifier is provided. The power combiner converts a differential output signal to a single-end output signal and transmits the single-end output signal to the antenna. The differential amplifier includes common-source input transistors, common-gate output transistors and a switch module. The common-source input transistors amplify a differential input signal and output an amplified differential signal. The common-gate output transistors, including sources electrically coupled to the common-source input transistors and drains electrically coupled to the power combiner, generate the differential output signal according to the amplified differential signal. The switch module is electrically coupled between the gates. The switch module electrically couples the gates of the common-gate output transistors if the RF transmitter is in operation and electrically isolates the gates if the RF receiver is in operation.
Fully depleted silicon on insulator power amplifier
The present disclosure generally relates to semiconductor structures and, more particularly, to a fully depleted silicon on insulator power amplifier with unique biases and voltage standing wave ratio protection and methods of manufacture. The structure includes a pseudo-differential common source amplifier; first stage cascode devices connected to the pseudo-differential common source amplifier and protecting the pseudo-differential common source amplifier from an over stress; second stage cascode devices connected to the first stage cascode devices and providing differential outputs; and at least one loop receiving the differential outputs from the second stage cascode devices and feeding back the differential outputs to the second stage cascode devices.
RF TRANSCEIVER AND RF TRANSMITTER OF THE SAME
An RF transmitter with a power combiner and a differential amplifier is provided. The power combiner converts a differential output signal to a single-end output signal and transmits the single-end output signal to the antenna. The differential amplifier includes common-source input transistors, common-gate output transistors and a switch module. The common-source input transistors amplify a differential input signal and output an amplified differential signal. The common-gate output transistors, including sources electrically coupled to the common-source input transistors and drains electrically coupled to the power combiner, generate the differential output signal according to the amplified differential signal. The switch module is electrically coupled between the gates. The switch module electrically couples the gates of the common-gate output transistors if the RF transmitter is in operation and electrically isolates the gates if the RF receiver is in operation.
AMPLIFIER ARCHITECTURE USING POSITIVE ENVELOPE FEEDBACK
Described herein are power amplifier (PA) architectures that improve PA performance (e.g., efficiency, linearity, etc.) over an extended range of the operating power levels of the PA. These architectures can be implemented on a single chip to provide a single-chip standalone PA solution. This improvement comes with little additional complexity, little additional current consumption, and/or little additional chip area. The architectures utilize a dynamic biasing technique using positive envelope feedback based at least in part on an instantaneous envelope signal at an output of a power amplifier.
Active device which has a high breakdown voltage, is memory-less, traps even harmonic signals and circuits used therewith
An active device and circuits utilized therewith are disclosed. In an aspect, the active device comprises an n-type transistor having a drain, gate and bulk and a p-type transistor having a drain, gate and bulk. The n-type transistor and the p-type transistor include a common source. The device includes a first capacitor coupled between the gate of the n-type transistor and the gate of the p-type transistor, a second capacitor coupled between the drain of the n-type transistor and the drain of p-type transistor and a third capacitor coupled between the bulk of the n-type transistor and the bulk of p-type transistor. The active device has a high breakdown voltage, is memory less and traps even harmonic signals.