Patent classifications
H03F2203/45481
INJECTION LOCK POWER AMPLIFIER WITH BACK-GATE BIAS
In an exemplary structure, a transformer has a primary side and a secondary side. Output from the primary side is coupled to the secondary side. A first power supply is connected to a center tap of the primary side of the transformer. An oscillator includes a first transistor and a second transistor. The front-gate of the first transistor is connected to the drain of the second transistor and the primary side of the transformer. The front-gate of the second transistor is connected to the drain of the first transistor and the primary side of the transformer. A third transistor is connected to the first transistor and a fourth transistor is connected to the second transistor. The third and fourth transistors inject a desired frequency to the oscillator. A voltage source is connected to the back-gate of the first transistor and the back-gate of the second transistor.
AMPLIFYING SIGNALS USING POSITIVE ENVELOPE FEEDBACK
Described herein are methods for amplifying radio-frequency signals using power amplifier (PA) architectures that improve PA performance (e.g., efficiency, linearity, etc.) over an extended range of the operating power levels of the PA. These methods can use positive envelope feedback to dynamically adjust a bias to a stage of the amplification chain. The methods improve amplification processes with little additional complexity, little additional current consumption, and/or little additional chip area relative to other typical amplification methods. The methods utilize a dynamic biasing technique using positive envelope feedback based at least in part on an instantaneous envelope signal at an output of a power amplifier.
BIAS CURRENT SUPPLY TECHNIQUES
Techniques for supplying a bias current to a load are provided. In certain examples, a circuit can include a level-shift capacitance, a current source, and a load configured to receive a bias current in a first state of the circuit. The current source and the level-shift capacitance can be coupled in series between the load and a supply voltage in the first state. In some examples, during a second state of the circuit, the level-shift capacitance can receive charge, and can be isolated from one of the load or the current source.
Injection lock power amplifier with back-gate bias
In an exemplary structure, a transformer has a primary side and a secondary side. Output from the primary side is coupled to the secondary side. A first power supply is connected to a center tap of the primary side of the transformer. An oscillator includes a first transistor and a second transistor. The front-gate of the first transistor is connected to the drain of the second transistor and the primary side of the transformer. The front-gate of the second transistor is connected to the drain of the first transistor and the primary side of the transformer. A third transistor is connected to the first transistor and a fourth transistor is connected to the second transistor. The third and fourth transistors inject a desired frequency to the oscillator. A voltage source is connected to the back-gate of the first transistor and the back-gate of the second transistor.
Active Device Which has a High Breakdown Voltage, is Memory-Less, Traps Even Harmonic Signals and Circuits Used Therewith
An active device and circuits utilized therewith are disclosed. In an aspect, the active device comprises an n-type transistor having a drain, gate and bulk and a p-type transistor having a drain, gate and bulk. The n-type transistor and the p-type transistor include a common source. The device includes a first capacitor coupled between the gate of the n-type transistor and the gate of the p-type transistor, a second capacitor coupled between the drain of the n-type transistor and the drain of p-type transistor and a third capacitor coupled between the bulk of the n-type transistor and the bulk of p-type transistor. The active device has a high breakdown voltage, is memory less and traps even harmonic signals.
INJECTION LOCK POWER AMPLIFIER WITH BACK-GATE BIAS
In an exemplary structure, a transformer has a primary side and a secondary side. Output from the primary side is coupled to the secondary side. A first power supply is connected to a center tap of the primary side of the transformer. An oscillator includes a first transistor and a second transistor. The front-gate of the first transistor is connected to the drain of the second transistor and the primary side of the transformer. The front-gate of the second transistor is connected to the drain of the first transistor and the primary side of the transformer. A third transistor is connected to the first transistor and a fourth transistor is connected to the second transistor. The third and fourth transistors inject a desired frequency to the oscillator. A voltage source is connected to the back-gate of the first transistor and the back-gate of the second transistor.
Self-testing of an analog mixed-signal circuit using pseudo-random noise
A method embodiment includes combining a control signal of a voltage regulator circuit of an apparatus with pseudo-random noise, and using the control signal to provide an output voltage signal as attenuated by a power supply rejection ratio (PSRR) of an analog mixed-signal (AMS) circuit of the apparatus. The method further includes self-testing the AMS circuit by cross-correlating a signal indicative of the output voltage signal from the AMS circuit with the pseudo-random noise and, in response, assessing the results of the cross-correlation relative to a known threshold indicative of a performance level of the AMS circuit.
Modulated supply amplifier with adjustable input parameter configuration
An amplifier may include control circuitry that may track a first input signal parameter and, in response, adjust a value of a second input parameter. Input parameter tracking and adjustment may facilitate control of output parameters for the amplifier. For example, an envelope-tracking amplifier may track input signal amplitude and adjust other input parameters in response. The adjustments may facilitate control of output parameters, such as gain or efficiency. The amplifier may further include calibration circuitry to determine adjustment responses to various tracked input parameters.
Apparatus and method for amplifying power in transmission device
Disclosed is a 5G (5.sup.th generation) or pre-5G communication system for supporting a data transmission rate higher than that of a 4G (4.sup.th generation) communication system such as long-term evolution (LTE). A transmission device comprises: a first amplification unit having a common source structure, including cross coupled capacitors, and amplifying an input signal; a second amplification unit, having a common gate structure, for amplifying a signal output from the first amplification unit; and a first removal unit which is connected to output terminals of the first amplification unit and input terminals of the second amplification unit and which removes at least one portion of second harmonics. The first removal unit can offset, with respect to a fundamental frequency, at least some of parasitic capacitance generated from the output terminals of the first amplification unit and the input terminals of the second amplification unit, and can ground a signal having a secondary harmonic frequency with respect to the secondary harmonic frequency.
Operational amplifier, driving interface, measurement and control device, driving circuit and driver
An operational amplifier, a driving interface, a measurement and control device, a driving circuit and a driver are provided. The operational amplifier is used as at least one of an input interface and output interface, and when the operational amplifier corresponds to one transistor (Q), an external circuit of the transistor further includes: a first port (Vdj), connected with a base (B) of the transistor (Q) through a first resistor (Rb); a second port (I/Oe), connected with an emitter E of the transistor (Q); a third port (I/Oc), connected with a collector (C) of the transistor (Q); and a fourth port (GND), connected with the emitter (E) of the transistor (Q) through a second resistor and used as a public port for signal input and signal output.