Patent classifications
H03F2203/45488
Low power receiver and related circuits
Low power radio frequency (RF) receivers and related circuits are described.
REJECTION OF END-OF-PACKET DRIBBLE IN HIGH SPEED UNIVERSAL SERIAL BUS REPEATERS
Universal Serial Bus (USB) repeater circuits and methods of operating the same for communicating data signals from a first pair of data terminals to a second pair of data terminals of the repeater. In a first channel, an amplifier stage in a receiver amplifies a differential signal received at the first pair of data terminals to generate a differential signal at first and second output nodes of the receiver, and a transmitting circuit transmits a differential signal at the second pair of data terminals responsive to the differential signal at the first and second output nodes of the receiver. The receiver includes a hysteresis stage that receives an offset in opposition to the differential signal at the first and second output nodes of the receiver. End-of-packet (EOP) dribble in USB communications in the HS mode is reduced by the offset at the hysteresis stage.
LOW POWER RECEIVER AND RELATED CIRCUITS
Low power radio frequency (RF) receivers and related circuits are described.
CONTINUOUS TIME LINEAR EQUALIZER EMPLOYING CURRENT-REUSE AND CURRENT-STEALING ARCHITECTURE
A continuous time linear equalizer (CTLE), comprising: a first transconductance gain circuit configured to amplify an input voltage signal with a first transconductance gain to generate a first current signal; a second transconductance gain circuit configured to amplify the input voltage signal with a second transconductance gain to generate a second current signal, wherein the second transconductance gain circuit is configured to reuse the first current signal to generate the second current signal; and at least one resistor through which the first current signal and the second current signal flow to generate an output voltage signal.
Self-controlled equalization circuit capable of providing an automatic gain control mechanism
A self-controlled equalization circuit includes a first amplifier, a second amplifier, a feedback signal generator, a frequency delay signal generator, a feedback enabling unit, an equalization control unit, and a gain control unit. The first amplifier includes a first input terminal and a second input terminal. The second amplifier is coupled to the first amplifier. The feedback signal generator is coupled to the second amplifier. The frequency delay signal generator is used for receiving a frequency signal. The feedback enabling unit is coupled to the output terminal of the frequency delay signal generator and the feedback signal generator. The equalization control unit is coupled to the feedback signal generator, the feedback enabling unit, and the first amplifier. The gain control unit is coupled to the feedback signal generator, the second input terminal of the first amplifier, and output terminals of the first amplifier.