A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.

A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a chopping modulator circuit that continuously swaps tail current sources between the transconductors. This tail current swapping reduces the contribution to the CFIA's gain error caused by random mismatch between the tail currents of the input and feedback transconductors. The modulator circuit operates on a clock cycle to periodically swap the tail current sources. As a result, even if the tail currents are mismatched, on average the tail currents (transconductor gains) will approximately equal out, and the contribution of the tail current difference to the gain error is canceled out.

Assemblies of electronic components for reception of data using optical fibre and methods for providing same. Assemblies comprise a photodiode; an amplifier coupled to the photodiode; at least one feedback resistor coupled between the input and output of the amplifier; an arrangement of at least two MOS transistors of same channel polarity and configured in parallel with the feedback resistor(s); a system for sensing received input signal level and applying a bias voltage to gates of the MOS transistors, the bias voltage varied according to the received input signal level to control a resistance apparent through the arrangement of MOS transistors; at least one capacitor configured to couple signals from the amplifier output to a gate of at least one of the MOS transistors; and at least one bias resistor configured to couple the bias voltage to a gate of at least one of the MOS transistors.

A sensor amplifier arrangement includes an amplifier having a signal input to receive a sensor signal and a signal output to provide an amplified sensor signal, and a feedback path that couples the signal output to the signal input and provides a feedback current that is an attenuated signal of the amplified sensor signal and is inverted with respect to the sensor signal.

A pseudo resistance circuit includes a first gate voltage adjustment circuit that adjusts respective currents of first and second current sources and also adjusts a gate voltage of a second field effect transistor to equalize or substantially equalize a drain voltage of the second field effect transistor and a voltage of a first end portion of a reference resistance element and controls a drain voltage of a first field effect transistor and the drain voltage of the second field effect transistor to maintain a constant or substantially constant relationship with each other; and a second gate voltage adjustment circuit that adjusts a gate voltage of the first field effect transistor to control the gate voltage of the second field effect transistor and the gate voltage of the first field effect transistor to maintain a constant or substantially constant relationship with each other.

The current feedback output circuit includes first and second transistors. The current feedback output circuit includes a current amplifier that has a non-inverting input terminal, an inverting input terminal, a first output terminal and a second output terminal, an input impedance of the non-inverting input terminal being higher than an input impedance of the inverting input terminal, and flows a current obtained by amplifying the difference between a current of an input signal to the non-inverting input terminal and a current input to the inverting input terminal between the first output terminal and the second output terminal. The current feedback output circuit includes first to sixth current mirror circuits. The current feedback output circuit includes a current feedback circuit that supplies a current responsive to a voltage at the signal output terminal to the inverting input terminal.

An electric amplifier circuit for amplifying an output signal of a microphone comprises a supply input terminal (V10) to apply a supply potential (VDDA) for operating the electric amplifier circuit and a differential amplifier (110) having a first input terminal (E110a) for applying the output signal of the microphone (20), a second input terminal (E110b) and an output terminal (A110) for outputting an amplified output signal (OUT) of the microphone (20). A feedback path (FP) is provided between the output terminal (A110) of the differential amplifier (110) and the second input terminal (E110b) of the differential amplifier (110). A charge supplying circuit (120) is coupled to the feedback path (FP) to supply an amount of the charge to the feedback path (FP) in dependence on the supply potential (VDDA). The amount of charge supplied to the feedback path may be dependent on a change of the supply potential (VDDA).

A pseudo resistance circuit includes a first gate voltage adjustment circuit that adjusts respective currents of first and second current sources and also adjusts a gate voltage of a second field effect transistor to equalize or substantially equalize a drain voltage of the second field effect transistor and a voltage of a first end portion of a reference resistance element and controls a drain voltage of a first field effect transistor and the drain voltage of the second field effect transistor to maintain a constant or substantially constant relationship with each other; and a second gate voltage adjustment circuit that adjusts a gate voltage of the first field effect transistor to control the gate voltage of the second field effect transistor and the gate voltage of the first field effect transistor to maintain a constant or substantially constant relationship with each other.

An amplifier operates to provide a high output impedance at an output through a push stage having a first transistor of a first transistor type and a pull stage having a second transistor of a second transistor type that is different from the first transistor type. The first transistor and the second transistor are coupled in a common-gate configuration. The first transistor and the second transistor are shorted together via a capacitor coupled to an input and share a common current path as a push-pull current-reusing common-gate low noise amplifier with a broadband input matching.

A receiver circuit comprising: an input-pin; a receiver-input-node; a ground-pin; an internal-node that is connected to the input-pin; and a MOSFET. The MOSFET has a conduction channel connected in series between the internal-node and the receiver-input-terminal; and a gate terminal, the voltage at which sets the conductivity of the conduction channel. The receiver circuit also includes an amplifier that: has an input terminal that is connected to the internal-node; and provides a voltage control signal to the gate terminal of the MOSFET such that the voltage at the internal-node with respect to the ground-pin is constant.