According to an embodiment, a circuit includes a high-Ω resistor including a plurality of semiconductor junction devices coupled in series and a plurality of additional capacitances formed in parallel with the plurality of semiconductor junction devices. Each semiconductor junction device of the plurality of semiconductor junction devices includes a parasitic doped well capacitance configured to insert a parasitic zero in a noise transfer function of the high-Ω resistor. Each additional capacitance of the plurality of additional capacitances is configured to adjust a parasitic pole in the noise transfer function of the high-Ω resistor in order to compensate for the parasitic zero.

A programmable amplifier circuit includes an amplifier, an input capacitor coupled to an input of the amplifier, a feedback capacitor coupled to the input of the amplifier and an output of the amplifier, and a switched-capacitor resistor circuit. The switched-capacitor resistor circuit is coupled between the input of the amplifier and the output of the amplifier, and configured for simulating a feedback resistor element to provide a resistance for a feedback path of the amplifier by using at least one capacitor placed between the input of the amplifier and the output of the amplifier to avoid leakage current(s) flowing back to an input of the amplifier.

Provided is a Radio Frequency (RF) communication apparatus and a method for detecting power. The RF communication apparatus includes a receiver that receives a segment value indicating one of multiple transmission output power ranges, a power detector that detects a strength of an RF transmission signal in an output power range corresponding to the segment value, and a transmitter that transmits the strength of the detected RF transmission signal. The power detector includes a feedback unit that receives the fed-back RF transmission signal, an RF core unit that generates a Root Mean Square (RMS) of the RF transmission signal, and a converter that converts a current signal corresponding to the RMS of the RF transmission signal into a voltage signal, and converts the converted voltage signal from a differential signal to a single signal.

A high CMRR neural signal amplifier is configured for supply rail common mode feedback (SR-CMFB) whereby a set of CMFB signals is provided to supply rails of front end LNAs. High CMRR is maintained through buffering outputs of front end signal LNAs and a reference LNA coupled to signal and reference inputs of second stage amplifiers, respectively; and buffering the reference LNA output using an active/guard buffer pair, whereby across a plurality of distinct multiplexing time intervals, during each multiplexing time interval one buffer of the pair functions as an active buffer that drives second stage amplifier reference inputs corresponding to second stage amplifier outputs being multiplexed to a set of multiplexor outputs, and the other buffer of the pair functions as a guard buffer coupled to other second stage amplifier reference inputs corresponding to second stage amplifier outputs not being multiplexed to the set of multiplexor outputs.

The application discloses a tuner and a method for tuning a signal. The tuner comprises: a sampling module, the sampling module being configured to receive an input signal and a set of control signals, sample the input signal under the control of the set of control signals and generate a sample signal; wherein each of the set of control signals has a control period equal to (N*T.sub.VCO), and the control periods of the set of control signals synchronize with each other; a set of weighting modules, wherein each of the set of weighting modules is configured to receive the set of sample signals and weight the received sample signals with a group of weighting factors to generate a group of weighted signals; and one or more summing modules, each summing module being configured to receive one group of weighted signals generated by one of the set of weighting modules and sum the group of weighted signals to output an output signal, wherein the output signal is the input signal being shifted by a predefined frequency f.sub.VCO*m.sub.k/N.

A motion sensor device comprises: a reverse electrowetting-on-dielectric (REWOD) generator configured to generate alternating current (AC) based on motion; a motion sensor configured to measure motion data; and a wireless motion sensor read-out circuit coupled to the REWOD generator and the motion sensor, the wireless motion sensor read-out circuit configured to transmit the motion data and operate on the AC from the REWOD generator.

In one form, a signal chain circuit includes a signal chain processing circuit between an input for receiving a differential input signal having a first common-mode voltage, and an output for providing a differential output signal having a second, different common-mode voltage. It includes an amplifier with a differential output stage coupled to a differential input stage and having positive and negative output terminals forming its output, and positive and negative feedback terminals. The differential output stage provides a first voltage drop between the positive output terminal and the positive feedback terminal, and a second voltage drop between the negative output terminal and the negative feedback terminal. The common-mode feedback circuit regulates a common-mode voltage between the positive and negative feedback terminals to the second common-mode voltage. In another form, an analog-to-digital converter includes a range extending logic circuit to extend the range of a ring oscillator based analog-to-digital converter.

In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.

An envelope signal time delay adjustment apparatus includes a negative group delay unit for converting an envelope signal input from a signal generator into an envelope signal having a group delay of a negative value whose frequency increases from a predetermined frequency band; an envelope-tracking modulator for power-amplifying and outputting the envelope signal output from the negative group delay unit; and a frequency limiting unit for limiting a bandwidth of the envelope-tracking modulator to be lower than an original bandwidth of the envelope-tracking modulator.

Circuitry and techniques described herein can use a clamp circuit to provide back-drive compensation in applications where a thermoelectric cooler (TEC) device is to be controlled. A back-drive compensation circuit can be used to inhibit or prevent a linear output stage of a TEC control circuit from being forced out of its intended operating range. The clamp circuit can be implemented using a variety of circuit topologies, such as including a comparator arrangement with hysteresis. In another approach, a linear amplifier topology can provide clamping behavior, such as by injecting or sinking a current at the output node or an intermediate node to inhibit or prevent the output node or intermediate node from being driven outside a specified voltage range by an external source.