An application specific integrated circuit (ASIC) can drive semiconductor devices, such as, radio frequency amplifiers, switches, etc. The ASIC can include a supply and reference voltage generation circuit, a digital core, a clock generator, a plurality of analog-to-digital converters, low and high-speed communications interfaces, drain and gate sensing circuits (that can include one or more current sense amplifiers), and a gate driver circuit. The ASIC can be a low voltage semiconductor integrated circuit.

An operational amplifier 1 comprises transistors Q1 and Q2 forming an input stage, and input resistors R1 and R2 which form a filter together with parasitic capacitors C1 and C2 accompanying the transistors Q1 and Q2. Resistance values R of the resistors R1 and R2 may be set to R=1/(2π.Math.fc.Math.C), where C is the capacitance value of each of the parasitic capacitors C1 and C2, and fc is the target cutoff frequency of the filter. The operational amplifier 1 may also include a power supply resistor R0 which forms a filter together with a parasitic capacitor C0 accompanying a power supply line.

This application relates to ADC circuitry. An ADC circuit (200) has first and second conversion paths (201a, 201b) for converting analogue signals to digital and is operable in first and second modes. In the first mode, the first and second conversion paths are connected to respective first and second input nodes (202a, 202b) to receive and convert full scale first and second analogue input signals (Ain1, Ain2) to separate digital outputs (Dout1, Dout2). In the second mode, the first and second conversion paths are both connected to the first input node (202a), to convert the first analogue input signal (Ain1) to respective first and second digital signals, and the first and second conversion paths are configured for processing different signal levels of the first analogue input signal. A selector (207) select the first digital signal or the second digital to be output as an output signal based on an indication of amplitude of the first analogue input signal.

An apparatus for turning off a cascode amplifier having a common-base transistor and a common-emitter transistor is disclosed that includes the cascode amplifier, a feedback circuit, and a bias circuit. The feedback circuit is configured to receive a collector-voltage from the collector of the common-emitter transistor when the common-emitter transistor is switched to a first OFF state and produce a first feedback signal. The collector-voltage is equal to an emitter voltage of the common-base transistor and the collector-voltage increases in response to switching the common-emitter transistor to the first OFF state. The bias circuit is configured to receive the first feedback signal and produce a bias-voltage. A first base-voltage is produced from the bias-voltage. The cascode amplifier is configured to receive the first base-voltage and a second base-voltage. The common-base transistor is configured to switch to a second OFF state in response to receiving the second base-voltage.

Low-leakage switch circuit techniques to reduce leakage current of an off-state switch, while maintaining a low on-resistance. The low-leakage switch circuit may allow measurement of low current signals in a transimpedance amplifier with improved accuracy without, the need for calibration. The low-leakage switch circuit may include a bootstrapping path connecting two or more terminals or voltage nodes of an off-state switch in the switch circuit. The bootstrapping path is configured to bootstrap major leakage current contributors in the switch circuit, such as the substrate diode leakage, the subthreshold leakage, or combinations thereof.

A transconductance amplifier (TCA) implemented with high electron mobility transistors (HEMTs) in a push-pull amplifier output stage provides a voltage controlled constant high output current to loads ranging from 10 mΩ to 1Ω with a bandwidth of 25 MHz. A driving stage for the HEMTs is implemented with variable gain amplifiers that amplify the input voltage signal and provide bias for the HEMTs. An automatic gain control may be connected between the TCA output and the variable gain amplifiers to ensure a constant current output for a varying load.

An amplifier includes: a signal polarity inversion circuit which modulates an input signal and outputs a modulation signal; an amplifier circuit which is constituted from an operational transconductance amplifier (OTA) to amplify the modulation signal and output a current; and a sample-hold circuit having a sampling capacitor which is charged and discharged by selective sampling of the output current of the amplifier circuit and a holding capacitor to which the voltage of the sampling capacitor is transferred.

The present disclosure relates to an amplifying circuit and a voltage generating circuit. The amplifying circuit includes: an operational amplifier, including a first input terminal, a second input terminal and an output terminal, and configured to be capable of outputting an output voltage corresponding to an input voltage from the output terminal to the first input terminal; a voltage dividing circuit, including a series circuit of a plurality of voltage dividing resistors disposed between the output terminal and a predetermined potential terminal, wherein the series circuit includes a feedback node connected to the second input terminal and a correction node different from the feedback node; and a correction circuit, including a diode inserted between the correction node and the predetermined potential terminal.

A differential to single-ended buffer amplifier with a swing suppression resistor in the differential amplification architecture is shown. The differential to single-ended buffer amplifier has a positive input terminal, a negative input terminal, a differential to single-ended operational amplifier (DISO op amp), and a swing suppression resistor. The DISO op amp has a non-inverting input terminal and an inverting input terminal respectively coupled to the positive input terminal and the negative input terminal, and it has a single-ended output terminal that outputs the output signal of the differential to single-ended buffer amplifier. The swing suppression resistor is connected between the negative input terminal of the differential to single-ended buffer amplifier and the non-inverting input terminal of the DISO op amp.

An envelope tracking method and device are provided. The envelope tracking method includes: acquiring, by a boost circuit, a target envelope tracking input current signal, and transmitting, by the boost circuit, the target envelope tracking input current signal to an amplifier circuit, where the amplifier circuit includes an operational amplifier and a feedback network, and the operational amplifier operates in a mode of floating ground; and performing, by the amplifier circuit, closed-loop conversion and amplification on the target envelope tracking input current signal and outputting, by the amplifier circuit, an envelope tracking output voltage.