H03F2203/45528

Output terminal fault detection circuit

A circuit includes a gain stage, first and second amplifiers, and a comparison circuit. The gain stage has an input and an output. The first amplifier has an input and an output. The input of the first amplifier is coupled to the input of the gain stage. The second amplifier has an input and an output. The input of the second amplifier is coupled to the output of the gain stage. The comparison circuit is coupled to the outputs of the first and second amplifiers. The comparison circuit is configured to compare signals on the outputs of the first and second amplifiers and to generate a fault flag signal responsive to the output signal from the first amplifier being different than the output signal from the second amplifier.

CURRENT DETECTION CIRCUIT
20230123382 · 2023-04-20 ·

A current detection circuit includes normally-on-type and a first normally-off-type switching elements with main current paths that are connected in series, and a second normally-off-type switching element that has a source and a gate that are connected to a source and a gate of the first normally-off-type switching element and a drain that is connected to a constant current source, and executes a division process by using drain voltages of the two normally-off-type switching elements.

DELAY ADJUSTMENT CIRCUITS
20230119349 · 2023-04-20 ·

Methods, systems, and devices for delay adjustment circuits are described. Amplifiers (e.g., differential amplifiers) may act like variable capacitors (e.g., due to the Miller-effect) to control delays of signals between buffer (e.g., re-driver) stages. The gains of the amplifiers may be adjusted by adjusting the currents through the amplifiers, which may change the apparent capacitances seen by the signal line (due to the Miller-effect). The capacitance of each amplifier may be the intrinsic capacitance of input transistors that make up the amplifier, or may be a discrete capacitor. In some examples, two differential stages may be inserted on a four-phase clocking system (e.g., one on 0 and 180 phases, the other on 90 and 270 phases), and may be controlled differentially to control phase-to-phase delay.

High-linearity amplifier
11632087 · 2023-04-18 · ·

A high-linearity amplifier including a main operational amplifier, a feedback circuit, and a compensation circuit is shown. The feedback circuit couples an output signal of the main operational amplifier to an input port of the main operational amplifier. The compensation circuit couples a former-stage circuit of the amplifier to the input port of the main operational amplifier to compensate for the non-linearity of the feedback circuit. The compensation circuit and the feedback circuit form an inverse paralleling linearization architecture. In the inverse paralleling linearization architecture, a resistor in the feedback circuit corresponds to a resistor in the compensation circuit which is biased in an inversed way in comparison with the corresponding resistor in the feedback circuit.

Battery detection device

The present disclosure provides a battery detection device. The detection circuit is disposed on the battery and produces an impedance value variation quantity according to a deformation of the battery. The detection circuit includes four connection nodes. The first connection node and the third connection node are connected with the battery. A voltage variation quantity is produced between the second connection node and the fourth connection node according to the impedance value variation quantity. The protection circuit is connected with the second connection node and the fourth connection node. The protection circuit is in an ON state when the voltage variation quantity is greater than or equal to a cut-off voltage. The protection circuit is in an OFF state when the voltage variation quantity is less than the cut-off voltage, so that an operation state of the battery is changed accordingly.

SYSTEM AND METHOD FOR AUTO CALIBRATION IN A POWER BLACKOUT SENSING SYSTEM
20220337208 · 2022-10-20 ·

A calibration amplifier includes: a plurality of transistors and a variable resistor configured to change in response to clock pulses. During a calibration cycle, one of the plurality of transistors switches on in each calibration step based on a plurality of enable signals, and a gain of the calibration amplifier changes until an output voltage of the calibration amplifier exceeds a reference voltage and is set to a calibrated gain. The calibration amplifier outputs the output voltage by amplifying an input voltage using the calibrated gain.

Amplifier input offset compensation

Various examples are directed to amplifier circuits and methods for operating amplifier circuits. The amplifier circuit may comprise a first amplifier stage. The first amplifier stage comprises a first amplifier, a first feedback resistance, a second amplifier, a second feedback resistance, and a gain resistance. A first current source may be electrically coupled to provide a first current across the gain resistance in a first direction. A second current source may be electrically coupled to provide a second current across the gain resistance in a second direction opposite to the first direction.

Apparatus and methods for removing a large-signal voltage offset from a biomedical signal

Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

SINGLE-ENDED ANALOG SIGNAL RECEIVER APPARATUS

A single-ended analog signal receiver apparatus is provided, which can cope with an external ground current and an undefined impedance through an AC bootstrap input impedance, while considering electromagnetic compatibility, convert a received single-ended analog signal into a balanced output differential signal, and may provide at a post-stage circuit output an output signal with lower noise through common mode rejection.

Delta-difference amplifier circuit for restraint control module

A system for diagnosing a squib loop in a restraint control module. The system may include a first amplifier, a capacitor, a second amplifier. The first amplifier may have a first input connected to a first side of the squib and a second input connected to a second side of the squib. The output of the first amplifier may generate an output voltage corresponding to the voltage drop across the squib. The capacitor may be connected in series with the output of the first amplifier and the output of the first amplifier may be connected to a first side of the capacitor. The second amplifier having a first input connected to a second side of the capacitor. A second input of the second amplifier may be connected to a reference voltage. The second amplifier may be configured with a feedback loop to generate a gain output.