A receiver circuit is configured to receive input signals having a first reference voltage level. The first reference voltage level is a first logical high voltage level. The receiver circuit comprises an input stage comprising a resistive voltage divider. The resistive voltage divider is configured to convert the input signals having the first reference voltage level to input signals having a second reference voltage level. The second reference voltage level is a second logical high voltage level. The receiver circuit comprises a preamplifier configured to receive and amplify the input signals having the second reference voltage level.

A signal measurement apparatus and signal measurement method are provided. The measurement apparatus includes a compensation signal generating circuit configured to generate a target compensation signal that reduces a carrier frequency component in a voltage signal that is input into an amplifier based on an output signal of the amplifier, and the amplifier amplifies the voltage signal to which the target compensation signal is applied, wherein the compensation signal generating circuit is configured to determine a signal value of a subsequent compensation signal based on a signal value of the output signal of the amplifier amplified by applying a previous compensation signal, when determining the target compensation signal.

According to one embodiment, a memory device includes a memory cell including a resistance change memory element and a selector element, a word line, a bit line connected to one end of the memory cell, an operational amplifier including a non-inverting input connected to the bit line, an output circuit including a first terminal connected to an output of the operational amplifier, a second terminal connected to the bit line, and a charge/discharge circuit including a capacitor, a charge circuit and a discharge circuit, each including one end connected to an inverting input of the operational amplifier. At the time of falling of a write voltage for the memory cell, a potential of the other end of the memory cell is set higher than a potential of the other end of the discharge circuit.

An amplifier includes: a first input transistor connected to a first input, a first output, and a power source or a ground, a second input transistor connected to a second input, a second output, and the power source or the ground; a first replica transistor connected to the first input, a detection node, and the power source or the ground; a second replica transistor connected to the second input, the detection node, and the power source or the ground; and a bias transistor connected to a bias voltage, the detection node, and the power source or the ground.

An oscilloscope probe includes a tip network, a low-loss signal cable, and a terminating assembly. The tip network is connected to the signal cable and is configured to electrically connect to a device under test via a tip network node. The terminating assembly includes an amplifier, a feedback network and a terminating attenuator. The amplifier has an inverting input, a non-inverting input connected to ground, and an amplifier output configured to connect to an oscilloscope input. The feedback network is connected between the inverting input and the amplifier output. The terminating attenuator includes a first loop circuit and a second loop circuit. The first loop circuit is provided between the signal cable and the inverting input of the amplifier. The second loop circuit is provided between the signal cable, and ground. Resistance of terminating resistors in the loop circuits are selected to match characteristic impedance of the signal cable.

A method and apparatus for correcting baseline wander is disclosed. The method and apparatus may include generating filtered signals by filtering input signals using a filter circuit. An equalizer circuit using the filtered signals may generate output signals. Feedback networks may be configured to couple a respective output signal to a corresponding filtered signal.

A signal acquisition or conditioning amplifier can be configured and controlled to use correlated doubling sampling (CDS) of a differential input signal, and a storage capacitor in a capacitive or other feedback network, a low power operational transconductance amplifier (OTA) capable of being powered down between CDS samplings, and which can be operated in a manner that provides good performance characteristics while still providing low or efficient power consumption. The amplifier and other signal processing circuitry can allow power to be scaled down, when less signal measurement throughput is needed, and to be scaled up, when more signal measurement throughput is needed. Such flexibility can help make the present approach useful for a wide range of signal acquisition and measurement applications. Precharging via buffer amplifiers can provide improved signal acquisition circuitry effective input impedance.

A pseudo-resistor structure, comprises: a first and a second PMOS transistor or PN diode configured as two-terminal devices, wherein the positive terminal of the first PMOS transistor or PN diode is connected to the positive terminal of the second PMOS transistor or PN diode, and wherein the negative terminal of the first PMOS transistor or PN diode is connected to an input (A) of the pseudo-resistor structure and wherein the negative terminal of the second PMOS transistor or PN diode is connected to an output (C) of the pseudo-resistor structure, and a dummy transistor or dummy diode connected to the input (A), wherein the dummy transistor or dummy diode is further connected to a bias voltage for compensating a leakage current through the first and the second PMOS transistors or PN diodes. A closed-loop operational amplifier circuit comprising the pseudo-resistor structure is provided. Also, a bio-potential sensor comprising the closed-loop operational amplifier circuit is provided.

A gain amplifier of a sensing circuit for sensing degradation of an OLED display panel, the gain amplifier comprising: an operation amplifier; and a plurality of gain amplifier cells sequentially coupled to the operation amplifier. Each of the gain amplifier cells comprises a plurality of capacitors each placed between two internal nodes of the gain amplifier cell, excluding a ground node, such that a voltage gain of the gain amplifier and a DC offset of the gain amplifier are determined according to capacitances of the capacitors without considering parasitic capacitance.

A preamplifier comprises an input stage and a capacitive coupling stage. The input stage is arranged to receive a differential signal from a magnetic resistor which indicates a magnetic field sensed on a magnetic disk of a hard disk drive (HDD) when the preamplifier is powered on from an off state. The capacitive coupling stage has an input arranged to receive the differential signal from the input stage, a filter comprising a first resistor, a second resistor, a first capacitor, a second capacitor, and switches arranged in parallel with respective resistors, where the switches are closed when the preamplifier is powered on from the off state to an on state. A switch control is arranged to determine that an offset of the differential signal has settled and open the switches based on the determination.