Patent classifications
H03F2203/45548
Shielding techniques for noise reduction in surface electromyography signal measurement and related systems and methods
Techniques for shielding wearable surface electromyography (sEMG) devices are described. According to some aspects, an sEMG device may comprise amplification circuitry comprising at least a first differential amplifier and at least two sEMG electrodes electrically connected to the amplification circuitry. The device may further comprise at least one auxiliary conductor not electrically connected to the amplification circuitry, wherein the at least one auxiliary conductor is configured to be electrically coupled to a wearer of the wearable device, and an electromagnetic shield surrounding the wearable device at least in part and electrically connected to the at least one auxiliary conductor.
WIRELESS RECEIVING DEVICE
A wireless receiving device is provided. The wireless receiving device includes a first passive mixer and a common gate amplifier. The first passive mixer receives an oscillation signal. The common gate amplifier is coupled to the first passive mixer, and automatically adjusts the input impedance of the common gate amplifier according to the oscillation frequency of the oscillation signal.
INVERTER STACKING AMPLIFIER
The exemplified disclosure presents a highly power efficient amplifier (e.g., front-end inverter and/or amplifier) that achieves significant current reuse (e.g., 6-time for a 3-stack embodiments) by stacking inverters and splitting the capacitor feedback network. In some embodiments, the exemplified technology facilitates N-time current reuse to substantially reduced power consumption. It is observed that the exemplified disclosure facilitates significant current-reuse operation that significantly boost gain gm while providing low noise performance without increasing power usage. In addition, the exemplified technology is implemented such that current reuse and number of transistor has a generally linear relationship and using fewer transistors as compared to known circuits of similar topology.
Amplifier circuit and transimpedance amplifier circuit
An amplifier circuit comprising: a first amplifier, comprising a voltage input terminal and a voltage output terminal; a voltage offset providing circuit, comprising a first terminal coupled to a first predetermined voltage source, a second terminal coupled to the voltage output terminal, and a third terminal, wherein a voltage at the third terminal is higher than a voltage at the second terminal by an offset voltage; and a voltage control capacitor, comprising a fourth terminal coupled to the third terminal, and a fifth terminal coupled to the voltage input terminal, wherein a capacitance value of the voltage control capacitor corresponds to a voltage difference between a voltage at the fifth terminal and a voltage at the fourth terminal. A better compensation for the amplifier circuit can be acquired since a voltage control capacitor having a capacitance value corresponding to the output voltage of the amplifier is applied.
AMPLIFIER CIRCUIT AND TRANSIMPEDANCE AMPLIFIER CIRCUIT
An amplifier circuit comprising: a first amplifier, comprising a voltage input terminal and a voltage output terminal; a voltage offset providing circuit, comprising a first terminal coupled to a first predetermined voltage source, a second terminal coupled to the voltage output terminal, and a third terminal, wherein a voltage at the third terminal is higher than a voltage at the second terminal by an offset voltage; and a voltage control capacitor, comprising a fourth terminal coupled to the third terminal, and a fifth terminal coupled to the voltage input terminal, wherein a capacitance value of the voltage control capacitor corresponds to a voltage difference between a voltage at the fifth terminal and a voltage at the fourth terminal. A better compensation for the amplifier circuit can be acquired since a voltage control capacitor having a capacitance value corresponding to the output voltage of the amplifier is applied.
PRECISION OPERATIONAL AMPLIFIER WITH A FLOATING INPUT STAGE
The operational amplifier disclosed includes an input stage configured to receive power from a floating supply in a low voltage range that can float according to the common mode voltage at the input. The floating supply facilitates the use of low voltage components that can improve the precision of the operational amplifier by lowering the offset voltage. The input stage includes a first gain stage including field effect transistors and a second gain stage using bipolar transistors. The gain stages can be implemented differently to accommodate different applications and fabrication capabilities.
SHIELDING TECHNIQUES FOR NOISE REDUCTION IN SURFACE ELECTROMYOGRAPHY SIGNAL MEASUREMENT AND RELATED SYSTEMS AND METHODS
Techniques for shielding wearable surface electromyography (sEMG) devices are described. According to some aspects, an sEMG device may comprise amplification circuitry comprising at least a first differential amplifier and at least two sEMG electrodes electrically connected to the amplification circuitry. The device may further comprise at least one auxiliary conductor not electrically connected to the amplification circuitry, wherein the at least one auxiliary conductor is configured to be electrically coupled to a wearer of the wearable device, and an electromagnetic shield surrounding the wearable device at least in part and electrically connected to the at least one auxiliary conductor.
SINGLE-STAGE ACTIVE INTEGRATOR WITH MULTIPLICATION OF PHOTODIODE CURRENT
An embodiment of this disclosure provides an automated payment apparatus. The apparatus includes a photodiode current integrator configured to charge an integration capacitor. The photodiode current integrator includes a first feedback resistor connected along a negative feedback path of an operational amplifier between an output of the operational amplifier and a negative input of the operational amplifier. The photodiode current integrator also includes a second feedback resistor connected along a positive feedback path of the operational amplifier between the output of the operational amplifier and a positive input of the operational amplifier. The photodiode current integrator also includes an integration capacitor connected to the positive input of the operational amplifier and to common circuit ground. The photodiode current integrator also includes a reset switch connected to the positive input of the operational amplifier and to common circuit ground or to additional voltage source. The photodiode current integrator also includes a photodiode connected to the positive input and the negative input of the operational amplifier.
Apparatus and method for amplifying power in transmission device
Disclosed is a 5G (5.sup.th generation) or pre-5G communication system for supporting a data transmission rate higher than that of a 4G (4.sup.th generation) communication system such as long-term evolution (LTE). A transmission device comprises: a first amplification unit having a common source structure, including cross coupled capacitors, and amplifying an input signal; a second amplification unit, having a common gate structure, for amplifying a signal output from the first amplification unit; and a first removal unit which is connected to output terminals of the first amplification unit and input terminals of the second amplification unit and which removes at least one portion of second harmonics. The first removal unit can offset, with respect to a fundamental frequency, at least some of parasitic capacitance generated from the output terminals of the first amplification unit and the input terminals of the second amplification unit, and can ground a signal having a secondary harmonic frequency with respect to the secondary harmonic frequency.
Linearization of a radiofrequency-signal transmission chain
A transmission chain receives an incident signal to be transmitted having a first power and a first bandwidth. A first modulator frequency shifts a first signal derived from the incident signal to generate a first shifted signal at a modulation output. A power amplifier coupled to the modulation output amplifies an intermediate signal to generate an amplified output signal. A predistortion-signal-generating circuit generates, from the incident signal and from the amplified output signal in a second bandwidth that is larger than the first bandwidth, a predistortion signal having a second power lower than the first power. A second modulator frequency shifts a second signal derived from the predistortion signal to generate a second shifted signal for combination with the first shifted signal at said modulation output to produce the intermediate signal.