A voltage-to-current converter that reduces third harmonic distortion. An amplifier includes an input stage. The input stage includes a first voltage-to-current conversion stage and a second voltage-to-current conversion stage. The first voltage-to-current conversion stage is configured to provide an input to output gain with compressive nonlinearity. The second voltage-to-current stage is cascaded with the first voltage-to-current conversion stage. An input of the second voltage-to-current stage is connected to an output of the first voltage-to-current conversion stage. The second voltage-to-current conversion stage is configured to provide an input to output gain with expansive nonlinearity.

A voltage-to-current converter that reduces third harmonic distortion. An amplifier includes an input stage. The input stage includes a first voltage-to-current conversion stage and a second voltage-to-current conversion stage. The first voltage-to-current conversion stage is configured to provide an input to output gain with compressive nonlinearity. The second voltage-to-current stage is cascaded with the first voltage-to-current conversion stage. An input of the second voltage-to-current stage is connected to an output of the first voltage-to-current conversion stage. The second voltage-to-current conversion stage is configured to provide an input to output gain with expansive nonlinearity.

A switched-capacitor circuit is described herein. In accordance with one exemplary embodiment the switched-capacitor circuit includes a first input node and a second input node and an input switch unit. The input switch is connected to the first input node and the second input node and has a first output node and a second output node. A first capacitor is coupled to the first output node of the input switch unit, and a second capacitor is coupled to the second output node of the input switch unit. The input switch unit includes a plurality of switches configured to con-nect and disconnect one of the first and second input nodes and one of the first capacitor and the second capacitor. The input switch unit further includes a first charge pump coupled to the first input node and a second charge pump coupled to the second input node. The first charge pump is configured to generate, based on a clock signal, switching signals for a switch of the plurality of switches, and the second charge pump is configured to generate, based on the clock signal, switching signals for a further switch of the plurality of switches.

An operational amplifier circuit is provided. The operational amplifier circuit includes a differential input stage circuit and a loading stage circuit. The differential input stage circuit includes a first current source, a first transistor, a second transistor, a third transistor, and a fourth transistor. The control terminal of the first transistor receives a first input signal. The control terminal of the second transistor receives a second input signal. The third transistor has a first terminal coupled to the second terminal of the first transistor, a second terminal coupled to the first current source, and a control terminal coupled to the control terminal of the second transistor. The fourth transistor has a first terminal coupled to the second terminal of the second transistor, a second terminal coupled to the first current source, and a control terminal coupled to the control terminal of the first transistor.

An operational amplifier comprises: a first amplifier stage 4 comprising a first differential pair of transistors 8, 10 arranged to receive and amplify a differential input signal 18, 20 thereby providing a first differential output signal 22, 24; and a second amplifier stage 6 comprising a second differential pair of transistors 26, 28 arranged to receive and amplify the first differential output signal 22, 24 thereby providing a second differential output signal 38, 40.

An impedance converter circuit achieves negative capacitance and/or negative inductance for radio frequency (RF) front end impedance matching for low noise amplifier (LNA) designs. The impedance converter circuit includes a first transistor coupled to a first RF input at a source of the first transistor. The impedance converter circuit also includes a second transistor coupled to a second RF input at a source of the second transistor. The second transistor is cross-coupled to the first transistor to form a cross-coupled pair of transistors. The cross-coupled pair of transistors is configured to generate a negative capacitance or a negative inductance based on a load impedance coupled to a drain of the first transistor and a drain of the second transistor.

An operational amplifier circuit is provided. The operational amplifier circuit includes a differential input stage circuit and a loading stage circuit. The differential input stage circuit includes a first current source, a first transistor, a second transistor, a third transistor, and a fourth transistor. The control terminal of the first transistor receives a first input signal. The control terminal of the second transistor receives a second input signal. The third transistor has a first terminal coupled to the second terminal of the first transistor, a second terminal coupled to the first current source, and a control terminal coupled to the control terminal of the second transistor. The fourth transistor has a first terminal coupled to the second terminal of the second transistor, a second terminal coupled to the first current source, and a control terminal coupled to the control terminal of the first transistor.

Systems and method for improving operation of a radio frequency system are provided. One embodiment includes a switching power amplifier that outputs an amplified analog electrical signal based on an input electrical signal and voltage of an envelope voltage supply rail. The switching power amplifier includes a first transistor with a gate that receives the input electrical signal, a source electrically coupled to the envelope voltage supply rail, and a drain electrically coupled to an output of the switching power amplifier; a second transistor with a gate that receives the input electrical signal, a source electrically coupled to ground, and a drain electrically coupled to the output; and a third transistor with a gate that receives the input electrical signal, a drain electrically coupled to the envelope voltage supply rail, and a source electrically coupled to an output of another switching power amplifier.

An apparatus includes a reference voltage circuit having a bandgap input and a reference voltage output. The apparatus also includes a digital-to-analog converter (DAC) coupled to the reference voltage output and having a digital signal input. The apparatus includes an amplifier having a first input coupled to an output of the DAC. The first input is coupled to an output of the amplifier via a feedback resistor. The apparatus includes a resistor coupled to the reference voltage output and having a body terminal coupled to the output of the amplifier.

An amplifier may include a first stage configured to receive an input signal at an amplifier input and generate an intermediate signal which is a function of the input signal, and a final output stage configured to generate an output signal which is a function of the intermediate signal at an amplifier output, and a signal feedback network coupled between the amplifier output and input. The final output stage may be switchable among a plurality of modes including at least a first mode in which the final output stage generates the output signal as a modulated output signal which is a function of the intermediate signal, and a second mode in which the final output stage generates the output signal as an unmodulated output signal which is a function of the intermediate signal. Control circuitry may reduce audio artifacts associated with switching between modes.