A switched-capacitor circuit is described herein. In accordance with one exemplary embodiment the switched-capacitor circuit includes a first input node and a second input node and an input switch unit. The input switch is connected to the first input node and the second input node and has a first output node and a second output node. A first capacitor is coupled to the first output node of the input switch unit, and a second capacitor is coupled to the second output node of the input switch unit. The input switch unit includes a plurality of switches configured to con-nect and disconnect one of the first and second input nodes and one of the first capacitor and the second capacitor. The input switch unit further includes a first charge pump coupled to the first input node and a second charge pump coupled to the second input node. The first charge pump is configured to generate, based on a clock signal, switching signals for a switch of the plurality of switches, and the second charge pump is configured to generate, based on the clock signal, switching signals for a further switch of the plurality of switches.

Embodiments herein include a replica communication path and monitor circuit to provide increased common mode transient immunity. As its name suggests, the monitor circuit monitors the replica communication path and produces an adjustment signal (common mode transient adjustment signal) to cancel presence of a common mode transient signal in one or more other communication paths conveying data signals.

An apparatus includes an amplifier having a first input and a second input. A first feedback resistor is coupled to the first input and has a first body terminal coupled to a first bias terminal. A second feedback resistor is coupled to the second input and has a second body terminal coupled to a second bias terminal.

An offset detection circuit includes: a comparison unit that generates a first comparison result between an amplifier output and a positive detection threshold value, and a second comparison result between the amplifier output and a negative detection threshold value; a first determination unit that generates a first offset determination result of two values indicating presence or absence of an offset according to a period during which the amplifier output exceeds the positive detection threshold value, based on the first comparison result; a second determination unit that generates a second offset determination result of two values indicating the presence or absence of an offset according to a period during which the amplifier output exceeds the negative detection threshold value, based on the second comparison result; and an output unit that generates a determination output of the offset based on the first and second offset determination results.

A display device includes an output circuit including a differential amplifier circuit, an output amplifier circuit that includes a first transistor of the first conduction type coupled between the first supply terminal and the output terminal, and including a control terminal coupled to the differential amplifier circuit, a first control circuit, an input terminal, an output terminal, and first to third supply terminals to which first to third supply voltages are applied, wherein the third supply voltage is set to a voltage between the first supply voltage and the second supply voltage, or the second supply voltage, and wherein the first control circuit includes a third transistor and a first switch which are coupled in series between the first supply terminal and the control terminal of the first transistor.

A feedback amplifier having an improved feedback network including two cross coupled switches that isolate the amplifier from extraneous undesired electrical signals present in a system or network when the amplifier is turned off (i.e., in an off-state). The cross coupled switches interconnect two feedback paths of a feedback network to enable out-of-phase differential signals to be summed and effectively canceled. Further, the feedback amplifier provides on-stage advantages to enable different amplifier characteristics and parameter to be selectively engaged by turning on or turning off certain feedback networks.

An amplifier, a circuit, and an optical communication system are provided. The disclosed amplifier may include a first transistor receiving a first portion of an input signal received at the amplifier, a second transistor receiving a second portion of the input signal, an automatic gain control signal that is dynamically adjustable in response to variations in an output of the amplifier, and a varactor that has its capacitance adjusted by changes in the automatic gain control signal and, as a result, adjusts a position of a pole in a transfer function of the amplifier.

An apparatus includes an amplifier having a first input and a second input. A first feedback resistor is coupled to the first input and has a first body terminal coupled to a first bias terminal. A second feedback resistor is coupled to the second input and has a second body terminal coupled to a second bias terminal.

A transmitter circuit comprises: an input, an encoder circuit, and a transmitter. During operation, the transmitter circuit receives an input signal. The encoder circuit encodes the received input signal into an encoded signal. The encoder circuit produces the encoded signal: i) to indicate changing states of the input signal, and ii) to include a supplemental transient signal with respect to the received input signal. The transmitter transmits the encoded signal from an output of the first circuit over a link to a second circuit such as a receiver circuit. A receiver decodes the encoded signal to reproduce a rendition of the input signal to control remote power supply circuitry. Presence of the supplemental transient signal in the encoded signal indicates to the receiver circuit that the first circuit actively transmits the output signal even though there may not be any change to a current state of the input signal.

A circuit may include first and second input nodes, first and second output nodes, first and second intermediate nodes, first and second resistances, a first amplification transistor coupled to the first input node, the first resistance, and the first intermediate node and a second amplification transistor coupled to the second input node, the second resistance, and the second intermediate node. The circuit may also include a first active device coupled to the first output node and the first intermediate node, a second active device coupled to the second output node and the second intermediate node, a first output transistor coupled to the first output node and configured to conduct based on a second intermediate signal on the second intermediate node, and a second output transistor coupled to the second output node and configured to conduct based on a first intermediate signal on the first intermediate node.