A semiconductor integrated circuit includes a first pad provided on one end side of a first resistive element and one end side of a second resistive element externally provided, a second pad provided on a different end side of the first resistive element, a third pad provided on a different end side of the second resistive element and one end side of a third resistive element externally provided, an operation amplifier, a first signal line, wired between an output terminal of the operation amplifier and the first pad, a second signal line wired between an inverting input terminal of the operation amplifier and the second pad, a third signal line wired between the inverting input terminal of the operational amplifier and the third pad, a first ESD protection element, provided to the first signal line, a fourth signal line, through which a voltage signal of the first pad.

An amplifier circuit can include an amplifier and a resistor network coupled to the amplifier. The resistor network can include a range resistor coupled in parallel to a resistor string, and one or more switches coupled to the resistor string. The resistor network can be used to calibrate gain and common mode rejection ratio (CMRR) of the amplifier circuit.

An amplifier comprising a differential amplifier configured to be provide a comparator function, and a gain trimming circuit is electrically configured to provide gain trimming using a T-network comprising a varistor element. In addition, a method of trimming the gain of a differential amplifier, comprising the steps of a first step, (a) providing the differential amplifier comprising resistors in both of its paths, a second step, (b) providing a varistor in a T-network between both said paths; and lastly, a third step, (c) trimming the gain of the differential amplifier by adjusting the varistor's resistance.

To provide a variable gain amplifier capable of correcting a DC offset voltage through simpler control even when a gain thereof is changed. A differential output type variable gain amplifier is equipped with a first voltage correction unit coupled to a preceding stage of a variable gain amplifier circuit and for outputting a first correction voltage to correct a potential difference generated between a first conductor provided with a first input resistor and a second conductor provided with a second input resistor, and a second voltage correction unit coupled to a subsequent stage of the variable gain amplifier circuit and for correcting a differential output. A control unit is configured to control the first correction voltage and a correction amount of a potential difference by the second voltage correction unit and thereby attenuate a DC offset voltage included in the differential output.

The inventive concepts relate to variable gain amplifiers. The variable gain amplifier including an amplifier, a first fixed resistor and a first variable resistor, a second fixed resistor and a second variable resistor, a third fixed resistor and a third variable resistor, a fourth fixed resistor and a fourth variable resistor, a first output terminal and a second output terminal, and a decoder may be provided. The decoder is configured to receive first control bits, generate second control bits from the first control bits, generate third and fourth control bits from the first or second control bits, respectively, transmit the first control bits and the third control bits to the third and fourth variable resistors to adjust resistance values, and transmit the second and fourth control bits to first and second variable resistors to adjust resistance values.

Provided is a reconfigurable amplifier. The reconfigurable amplifier includes a gain circuit including a gain path configured to amplify an input signal, and a feed forward circuit including a feed forward path configured to receive the input signal and perform feed forward compensation on the input signal, and a first control circuit configured to perform the feed forward compensation in a first mode by activating the feed forward path, and deactivate the feed forward path in a second mode different from the first mode.

An analog amplifier is provided. The analog variable amplifier includes a first amplifier stage configured to amplify a bias current to output a first output voltage and a second output voltage that respectively depend on a magnitude of a first input voltage and a second input voltage, a second amplifier stage configured to receive the first output voltage and the second output voltage of the first amplifier stage as inputs and to amplify the received first output voltage and the second output voltage, and at least one auxiliary bias current source coupled to an electrical connection between the first amplifier stage and the second amplifier stage through which the second amplifier stage receives the first output voltage, and coupled to an electrical connection between the first amplifier stage and the second amplifier stage through which the second amplifier stage receives the second output voltage.

An analog amplifier for recovering an abnormal operation of a common-mode feedback is provided. An analog variable amplifier includes a first input transistor and a second input transistor, a first output transistor and a second output transistor, a third transistor and a fourth transistor, a first current source, a fifth transistor and a sixth transistor, and a second current source. The first input transistor and the second input transistor amplify a bias current depending on a magnitude of a first input voltage and a second input voltage. The first output transistor and the second output transistor output the amplified bias current. The third transistor and the fourth transistor receive an output voltage of the first output transistor as an input and amplifying the received output voltage. The first current source provides a predetermined current between the first output transistor and the third transistor.

A sensor signal output circuit includes: a buffer amplifier which amplifies an output of a temperature sensor; an operational amplifier which amplifies an output of the buffer amplifier; an oscillator which generates a triangular wave signal; and a comparator which compares the triangular wave signal with an output of the operational amplifier to generate a PWM signal. After an offset adjusting resistor of the operational amplifier is adjusted at first temperature, the amplitude of the triangular wave signal is set to adjust the pulse width of the PWM signal at the first temperature. After that, a gain adjusting resistor of the operational amplifier is set to adjust the pulse width of the PWM signal at a second temperature.

The ABB blocks 332, 334, 336, and 318 are configured to process the I/Q signals corresponding to the first or the second HB independently or the I/Q signals corresponding to the LB in cooperation by two. In detail, the first ABB I block 332 and the first ABB Q block 334 operate independently in the 3G/4G mode but they are configured to process the I signal (or Q signal) of the LB in the 2G mode. Likewise, the second ABB Q block 336 and the second ABB I block 318 operate independently in the 3G/4G mode but they are configured to process the Q signal (or I signal) of the LB in the 2G mode. The first ABB I/Q blocks 332 and 334 and the second ABB I/Q blocks 336 and 318 are arranged symmetrically to processing the I/Q signals cooperatively in the 2G mode. In detail, the second ABB Q block 336 is arranged close to the first ABB Q block 334 such that the capacitor regions included in the first ABB I/Q blocks 332 and 334 are connected to each other and the capacitor regions included in the second ABB I/Q blocks 336 and 338 are connected to each other.