Patent classifications
H03F2203/45604
Driver Circuit
The driver circuit includes DC cut capacitors, an input buffer, input termination resistors connected in series between differential input signal terminals and an ESD protection circuit connected to a connection point of the input terminal resistors. The ESD protection circuit includes diodes.
Circuit Device And Solenoid Control Device
A current sense amplifier circuit of a circuit device includes: an operational amplifier; a first resistor provided between one end of a shunt resistor and a first node, a first switch provided between the first node and a first input node, a second resistor provided between another end of the shunt resistor and a second node, a second switch provided between the second node and a second input node, a third resistor provided between a constant voltage node and the third node, a third switch provided between the third node and the first input node, a fourth resistor provided between the constant voltage node and a fourth node, and a fourth switch provided between the fourth node and the second input node.
Receiver Front End for Digital Isolators
In at least one embodiment, a method for operating a receiver includes configuring a receiver front-end circuit of the receiver according to a selected power consumption configuration. The method includes adjusting a quiescent current of a programmable flat gain stage coupled to the receiver front-end circuit according to the selected power consumption configuration to compensate for any gain loss of the receiver front-end circuit in the selected power consumption configuration. The selected power consumption configuration may be a reduced power consumption configuration and the programmable flat gain stage may be configured to at least partially compensate for the gain loss of the receiver front-end circuit in the reduced power consumption configuration.
Integrated circuit using bias current, bias current generating device, and operating method for the same
Disclosed is an integrated circuit including a first bias current generating circuit. The first bias current generating circuit includes a first amplifier receiving a reference voltage and a first voltage and amplifying a difference between them to output a first output voltage, a first bias current generator receiving the first output voltage and outputting a first bias current in response to the first output voltage, a variable resistor receiving the first bias current and outputting the first voltage in response to the first bias current and a calibration code, a second bias current generator receiving the first output voltage and outputting a second bias current to a peripheral circuit in response to the first output voltage, and a third bias current generator receiving the first output voltage and outputting a third bias current to an external device through a first pad in response to the first output voltage.
Receiver front end for digital isolators
A receiver front-end includes a first peaking gain stage configured to amplify a received differential pair of signals received on an input differential pair of nodes. The first peaking gain stage has a first frequency response including a first peak gain at or near a carrier frequency in a first pass band. The first peak gain occurs just prior to a first cutoff frequency. A second peaking gain stage is configured to amplify a differential pair of signals generated by the first peaking gain stage. The second peaking gain stage has a high input impedance and a second frequency response including a second peak gain at or near the carrier frequency in a second pass band. The second peak gain occurs just prior to a second cutoff frequency. The first peaking gain stage and the second peaking gain stage have a cascaded peak gain at or near the carrier frequency.
Current monitor with fault detection
A difference amplifier can be used for providing an amplified representation of a sensed current through a load device. A separate signal path can be used to provide fast fault detection, without requiring use of the difference amplifier. For example, a voltage scaling circuit can be used to scale a differential input signal indicative of the load current. The scaled representation can then be compared against a specified threshold corresponding to a fault current value. In this manner, a high-speed low-voltage comparator can be used to provide detection of a fault current that otherwise exceeds an input range of the difference amplifier, where the difference amplifier is used separately for precision current monitoring. As an illustrative example, such a scheme can provide fault detection even when an input of the difference amplifier is saturated.
Apparatus for integrated offset voltage for photodiode current amplifier
An example apparatus includes: a first voltage source, a first amplifier having a noninverting input adapted to be coupled to a photodiode anode and coupled to the first voltage source, an inverting input adapted to be coupled to a photodiode cathode, and an output, a first resistor coupled to the first amplifier inverting input and to the first amplifier output, a first capacitor coupled to the inverting input of the first amplifier and the first amplifier output, and a second voltage source different from the first voltage source. There is a second amplifier having a noninverting input, an inverting input and an output. The noninverting input is coupled to the output of the first amplifier, the inverting input is coupled to the second voltage source, and there is a second resistor coupled to the inverting input and the output of the second amplifier.
DRIVER CIRCUIT ARRANGEMENT FOR DRIVING LOAD AND DIFFERENTIAL DRIVE ARRANGEMENT THEREOF
A driver circuit arrangement for driving a load and a differential drive arrangement thereof are provided. The driver circuit arrangement employs a dual feedback configuration with a feedback resistor and a current sensor feedback arrangement. The current sensor feedback arrangement provides a current feedback path from the amplifier output to the amplifier input, and has a current sensor resistor connected in an output current path of the driver circuit arrangement. A current feedback amplifier is present connected to the current sensor resistor and to the amplifier input.
POWER EFFICIENT SUM-OF-PRODUCTS CALCULATION DEVICE
A sum-of-products calculation device includes a first resistance unit, a second resistance unit, a first current source, a second current source and a differential amplifier. The first resistance unit includes two resistors coupled in parallel. The second resistance unit includes two resistors coupled in parallel. The first current source is coupled to the first resistance unit for generating a first voltage. The second current source is coupled to the second resistance unit for generating a second voltage. The differential amplifier is used to receive the first voltage and the second voltage, and generate a differential signal accordingly. The differential signal is corresponding to a sum-of-products.
HIGH-LINEARITY DIFFERENTIAL TO SINGLE ENDED BUFFER AMPLIFIER
A differential to single-ended buffer amplifier with a swing suppression resistor in the differential amplification architecture is shown. The differential to single-ended buffer amplifier has a positive input terminal, a negative input terminal, a differential to single-ended operational amplifier (DISO op amp), and a swing suppression resistor. The DISO op amp has a non-inverting input terminal and an inverting input terminal respectively coupled to the positive input terminal and the negative input terminal, and it has a single-ended output terminal that outputs the output signal of the differential to single-ended buffer amplifier. The swing suppression resistor is connected between the negative input terminal of the differential to single-ended buffer amplifier and the non-inverting input terminal of the DISO op amp.