In at least one embodiment, a method for operating a receiver includes configuring a receiver front-end circuit of the receiver according to a selected power consumption configuration. The method includes adjusting a quiescent current of a programmable flat gain stage coupled to the receiver front-end circuit according to the selected power consumption configuration to compensate for any gain loss of the receiver front-end circuit in the selected power consumption configuration. The selected power consumption configuration may be a reduced power consumption configuration and the programmable flat gain stage may be configured to at least partially compensate for the gain loss of the receiver front-end circuit in the reduced power consumption configuration.

The invention relates to a high-performance audio amplifier intended to control at least one loudspeaker, the amplifier comprising a pre-amplification stage that receives an input signal, a power amplification stage connected to the pre-amplification stage and a feedback that delivers to the pre-amplification stage an image of the output signal, the power amplification stage comprising two power supply circuits comprising a MOSFET transistor. The invention is characterized in that it comprises: a sub-circuit for assisting with charging, a sub-circuit for assisting with discharging said MOSFET transistor, and a voltage-shifting sub-circuit.

The invention relates to a high-performance audio amplifier intended to control at least one loudspeaker, the amplifier comprising a pre-amplification stage that receives an input signal, a power amplification stage connected to the pre-amplification stage and a feedback that delivers to the pre-amplification stage an image of the output signal, the power amplification stage comprising two power supply circuits comprising a MOSFET transistor. The invention is characterized in that it comprises: a sub-circuit for assisting with charging, a sub-circuit for assisting with discharging said MOSFET transistor, and a voltage-shifting sub-circuit.

In at least one embodiment, a method for operating a receiver includes configuring a receiver front-end circuit of the receiver according to a selected power consumption configuration. The method includes adjusting a quiescent current of a programmable flat gain stage coupled to the receiver front-end circuit according to the selected power consumption configuration to compensate for any gain loss of the receiver front-end circuit in the selected power consumption configuration. The selected power consumption configuration may be a reduced power consumption configuration and the programmable flat gain stage may be configured to at least partially compensate for the gain loss of the receiver front-end circuit in the reduced power consumption configuration.

In an embodiment, an amplifier circuit includes a second stage that includes a first switch circuit including first and second terminals, a plurality of resistive elements coupled between the first and second terminals of the first switch circuit, and a plurality of switches configured to control an equivalent resistance between the first and second terminals of the first switch circuit. During play mode, the second stage has a gain between the input of the second stage and the output of the second stage of a first value. During a transition from mute mode to play mode, the amplifier circuit is configured to progressively increase the gain of the second stage from a second value to the first value. During a transition from play mode to mute mode, the amplifier circuit is configured to progressively decrease the gain of the second stage from the first value to the second value.

A current feedback amplifier (CFA). The CFA includes a common-gate input stage, a biasing circuitry, and a differential pair coupled in parallel between the supply voltage node and the reference voltage node. The common-gate input stage amplifies an input signal received at an input node and supplies it to a gate of the complementary transistors of the differential pair. The biasing circuitry supplies a bias voltage to a gate of the transistors of the common-gate input stage. The input node of the common-gate input stage and a node between the complementary transistors in the first path of the differential pair are shorted.