The present application discloses an amplifier and a method for controlling a common mode voltage thereof. The method includes: generating a control signal according to a positive-terminal input signal, a negative-terminal input signal and a target common mode voltage; and coupling the controlling signal to a first terminal of a positive-terminal capacitor and a first terminal of a negative-terminal capacitor, to adjust degree of conduction of a positive-terminal p-type transistor and degree of conduction of a negative-terminal p-type transistor, or to adjust degree of conduction of a positive-terminal n-type transistor and degree of conduction of a negative-terminal n-type transistor, thereby changing a common mode voltage.

An amplification apparatus includes an amplifier having an inverting terminal, and a non-inverting terminal connected to a reset voltage node, a first capacitor connected to the inverting terminal, an input voltage being applied to the first capacitor, a second capacitor connected to the inverting terminal and an output terminal of the amplifier, and a duty-cycled resistor, connected in parallel to the second capacitor, including a first resistor. The duty-cycled resistor is configured to connect the first resistor and the inverting terminal and to disconnect the first resistor and the reset voltage node during a first time interval included in a period to complete an on-and-off cycle of the duty-cycled resistor, and disconnect the first resistor and the inverting terminal and to connect the first resistor and the reset voltage node during a second time interval included in the period.

Amplifiers with wide input range and low input capacitance are provided. In certain embodiments, an amplifier input stage includes a pair of input terminals, a pair of n-type input transistors, a first pair of isolation switches connected between the input terminals and the n-type input transistors, a pair of p-type input transistors, and a second pair of isolation switches connected between the input terminals and the p-type input transistors. The amplifier input stage further includes a control circuit that determines whether to use the n-type input transistors and/or the p-type input transistors for amplification based on a detected common-mode voltage of the input terminals. The control circuit opens the first pair of isolation switches to decouple the input terminals from the n-type input transistors when unused, and opens the second pair of isolation switches to decouple the input terminals from the p-type input transistors when unused.

According to an embodiment, there is provided an amplifier circuit including a first capacitive element, a first GM amplifier, and a second GM amplifier. The first GM amplifier includes a first input node, a second input node, and an output node. The output node is connected to one end of the first capacitive element. The second GM amplifier includes a first input node, a second input node, and an output node. The output node is connected to one end of the first capacitive element and the second input node.

An internal voltage offset between a positive input and a negative input of a first operational amplifier is compensated. The negative input and the positive input of the first operational amplifier are coupled at the same voltage level. A comparison current generated at an output of the first operational amplifier has a sign that is representative of a sign of the internal voltage offset. The output of the first operational amplifier is biased to a threshold voltage using a current-to-voltage converter. A control voltage is generated from a sum of the threshold voltage and a voltage conversion of the comparison current. Compensation for the internal voltage offset between the positive and negative inputs of the first operational amplifier is made dependent on the control voltage.

A capacitive amplifier device and technique for mitigating the perturbation within the switchable terminals of a feedback capacitor which is produced by the switching activity performed as part of the device's operation. The capacitive amplifier contains feedback components which can be switched without producing significant kickback or poorly behaved transitions due to the inclusion of at least one dedicated circuit. The dedicated circuit is a kickback limiter circuitry which is connected to a switchable node and is designed to reduce the kickback. The technique for reducing the kickback produced can be achieved by connecting and activating the kickback limiter circuitry.

15

A signal measuring apparatus and method is provided. The signal measuring apparatus inputs a reduced voltage signal to an input end of an amplifier by resetting a voltage signal, which is acquired by applying a known current signal to a target object, using a common mode voltage at least once during one period of a current signal. The signal measuring apparatus acquires a digital signal corresponding to an object impedance change by converting an output of the amplifier.

A method and apparatus of global coarse baseline correction (GCBC) for capacitive scanning. An input device may include a number (N) of sensor electrodes, a GCBC circuit, and detection circuitry. Each sensor electrode is associated with a respective channel. The GCBC circuit produces sensing signals in each of the N channels and the detection circuitry may detect changes in the capacitances of one or more sensor electrodes based on the sensing signals. In some implementations, the GCBC circuit may include a current source which outputs a first current, a transimpedance amplifier (TIA) which converts the first current to a sensing voltage, and a number (N) of resistors that can be coupled between the output of the TIA and the N sensor electrodes, respectively. The coupling of each resistor between the TIA and a respective sensor electrode produces a sensing signal in the channel associated with the sensor electrode.

The disclosure provides a bias voltage calibration circuit adapted for a signal receiving device. The bias voltage calibration circuit includes a reference voltage generator, a voltage-current converter, and a bias current generator. The reference voltage generator receives a voltage adjustment signal, and adjusts a voltage value of a generated reference voltage according to the voltage adjustment signal. The voltage-current converter is coupled to the reference voltage generator, and converts the reference voltage to generate a reference current. The bias current generator generates a plurality of bias currents according to the reference current, and provides the bias current to an equalization circuit of the signal receiving device in a calibration mode.

An apparatus includes a differential current-to-voltage conversion circuit that includes an input sampling stage circuit, a differential integration and DC signal cancellation stage circuit, and an amplification and accumulator stage circuit. An input common mode voltage of the differential current-to-voltage circuit is independent of an output common mode voltage of the differential current-to-voltage circuit.