A single-ended to differential circuit is presented. The circuit may be a single-ended to differential integrator or a single-ended to differential amplifier. The circuit determines a first output and a second output voltage based on an input voltage, first and second reference voltages. The circuit has a first, a second and a third input memory element. The circuit in a first phase, samples a voltage indicative of the input voltage on the first input memory element. The circuit in the first phase, samples a voltage indicative of the first reference voltage on the second input memory element. The circuit in the first phase, samples a voltage indicative of the second reference voltage on the third input memory element. The circuit, in a second phase, determines the first and second output voltage based on the sampled voltages on the first, second, and third input memory elements.

A transceiver includes a first common T-coil circuit coupled to a first input-output pin of the transceiver, a termination impedance coupled to the first common T-coil circuit and configured to match an impedance of a transmission line coupled to the first common T-coil circuit, an amplifier configured to receive an input signal from the first input-output pin through the first common T-coil circuit based on a receive enable signal, and a first transmission buffer configured to transmit an output signal to the first input-output pin through the first common T-coil circuit based on a transmit enable signal.

According to an aspect, an auto-zero amplifier includes a main amplifier, a secondary amplifier connected to the main amplifier, a plurality of switching including a first switch and a second switch, and a leakage control circuit.

A clamp circuit can control a clamp transistor such that a change in a photodiode current detection voltage signal in an optical receiver circuit can control the clamp transistor to change state when a difference of a clamp voltage and the photodiode current detection voltage signal exceeds a threshold voltage of the clamp transistor. Using a feedback loop, the clamp circuit can accurately clamp a current when the photodiode current is larger than a detect current threshold.

In embodiment, a measurement circuit forms a compensation signal that is representative of disturbances that are received while the measurement circuit is not receiving a signal to be measured, then the circuit removes the compensation signal from the measurement signal before measuring the value of the measurement signal.

Systems and methods for reducing column switch resistance error RRAM-based crossbar array circuits are disclosed. An example crossbar array circuit includes: a crossbar array including a row wire, a column wire, and a cross-point device connected between the row wire and the column wire; a column switch having a column switch input and a column switch output, connected to the cross-point device; an Op-amp device having a non-inverting input, an inverting input, and an Op-amp output; a three-terminal switch having a first terminal, a second terminal, and a third terminal. The three-terminal switch is connected to the inverting input and is configured to switch between the column switch input and the column switch output; a load resistor is connected with the column switch output and the Op-amp output.

A switched capacitor amplifier circuit includes an operational amplifier, a first capacitor and a second capacitor each having one end connected to a negative input terminal of the operational amplifier, a first switching circuit configured to connect the other end of the first capacitor and a signal source during a first operation, a second switching circuit configured to connect the other end of the second capacitor and the output terminal of the operational amplifier so as to connect the output terminal and the negative input terminal of the operational amplifier through the second capacitor during the second operation, and an impedance converter circuit configured to convert an output impedance of the signal source into a specified impedance, the impedance converter circuit being connected between the first switching circuit and the other end of the first capacitor.

The present invention provides a circuit having a filter with an amplifier circuit for filtering and amplifying an input signal to generate an output signal, wherein a corner frequency of the filter is adjustable to control a settling time of the output signal.

A switched capacitor amplifier circuit includes an operational amplifier, a first capacitor and a second capacitor each having one end connected to a negative input terminal of the operational amplifier, a first switching circuit configured to connect the other end of the first capacitor and a signal source during a first operation, a second switching circuit configured to connect the other end of the second capacitor and the output terminal of the operational amplifier so as to connect the output terminal and the negative input terminal of the operational amplifier through the second capacitor during the second operation, and an impedance converter circuit configured to convert an output impedance of the signal source into a specified impedance, the impedance converter circuit being connected between the first switching circuit and the other end of the first capacitor.

According to one embodiment, a memory device includes a memory cell including a resistance change memory element and a selector element, a word line, a bit line connected to one end of the memory cell, an operational amplifier including a non-inverting input connected to the bit line, an output circuit including a first terminal connected to an output of the operational amplifier, a second terminal connected to the bit line, and a charge/discharge circuit including a capacitor, a charge circuit and a discharge circuit, each including one end connected to an inverting input of the operational amplifier. At the time of falling of a write voltage for the memory cell, a potential of the other end of the memory cell is set higher than a potential of the other end of the discharge circuit.