The disclosed technology includes device, systems, techniques, and methods for amplifying a complex modulated signal with a mixed-signal power amplifier. A mixed-signal power amplifier may include an input network for splitting an input signal to multiple signals with corresponding phase and amplitude offsets, a main power amplification path including at least an analog power amplifier for amplifying a first signal, one or more auxiliary power amplification paths including at least one digitally controlled analog power amplifier in each path for amplifying a second signal, and an output network for combining the two amplified signals. The main power amplification path and the auxiliary power amplification paths can operate together to achieve load modulation to enhance the overall power amplifier efficiency at power back-off mode and the overall power amplifier linearity. The disclosed technology further includes transmission systems incorporating the mixed-signal power amplifier.

There is provided a phase-switch-equipped variable amplification device including a switch including one input port and two output ports and configured to output a single-ended signal input to the one input port into one of the two output ports, a first converter coupled to the two output ports of the switch and configured to convert the single-ended signal output from the switch into a pair of differential signals having phases different from each other by 180-degree and invert phases of the pair of differential signals in response to a switching operation at the switch, a variable amplifier configured to amplify the pair of differential signals in accordance with a control voltage, and a second converter configured to convert the pair of differential signals amplified by the variable amplifier into a single-ended signal.

A galvanic isolation circuit is formed by a differential transformer having primary and secondary windings for transmission of signals over a carrier between the primary and the secondary windings of the transformer. A galvanic isolation oxide layer is provide between the primary and secondary windings. Each winding includes include a center tap providing a low-impedance paths for dc and low frequency components of common-mode currents through the differential transformer. A pass-band stage is coupled to the secondary winding of the transformer and configured to permit propagation of signals over said carrier through the pass-band amplifier stage while providing for a rejection of common-mode noise.

Monolithic microwave integrated circuits (MMICs) tolerant to electrical overstress are provided. In certain embodiments, a MMIC includes a signal pad that receives a radio frequency (RF) signal, and an RF circuit coupled to the RF signal pad. The RF circuit includes a transistor layout, an input field-effect transistor (FET) implemented using a first portion of a plurality of gate fingers of the transistor layout, and an embedded protection device electrically connected between a gate and a source of the input FET and implemented using a second portion of the plurality of gate fingers. The MMIC is tolerant to electrical overstress events, such as field-induced charged-device model (FICDM) events.

A bias circuit for a PA. A first transistor has its drain terminal and its gate terminal connected to a first circuit node and its source terminal connected to a first supply terminal, a first current source connected to the first circuit node, and a first resistor connected between the first and second circuit nodes. A second transistor receives a first component of a differential input signal to the PA at its gate terminal, has its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal, and a third transistor receives a second component of the differential input signal to the PA at its gate terminal, having its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal. The gates terminals of the second and third transistors are biased by a first voltage.

A detector system for time-of-flight (TOF) positron emission topography (PET) includes an analog silicon photomultiplier (aSiPM) configured to detect at least one photon event. The aSiPM has an anode and a cathode. A transformer has a first side electrically coupled to the aSiPM to form a low-impedance current loop between the anode and the cathode of the transformer. An impedance ratio of the transformer N reduces an effective terminal resistance of the aSiPM. An amplifier is electrically coupled to a second side of the transformer. The amplifier has negative feedback path configured to minimize the voltage swing between a non-inverting input and an inverting input. The negative feedback path reduces an effective terminal capacitance and an effective load impedance of the aSiPM.

A power amplifier system includes a differential power amplifier and a bias circuit. The differential power amplifier is arranged for receiving a differential input pair to generate an output signal. The bias circuit is arranged for generating a bias voltage to bias the differential power amplifier, and the bias circuit comprises a source follower for receiving a reference voltage to generate the bias voltage.

A power amplification division circuit includes a conversion element having a one-turn annular first inductor and an N-turn annular second inductor in a shape along a portion of the first inductor and converting an input signal into positive and negative phase signals, a first transistor in which a source is connected with a third power source and a gate receives the positive signal, a second transistor in which a source is connected with a fourth power source and a gate receives the negative phase signal, a first impedance circuit connected between the gate of the first transistor and a drain of the second transistor, a second impedance circuit connected between the gate of the second transistor and a drain of the first transistor, and an output matching circuit connected with the drains of the first and second transistors and outputting first and second divided signals.

A complementary metal oxide silicon transceiver having an integrated power amplifier is provided. The complementary metal oxide silicon transceiver having the integrated power amplifier is capable of controlling an output power according to a communication environment to solve the following problem that with the increment of an output level of a power amplifier, performance is decreased when noises flow into other blocks of a transceiver with power and thus are inputted to the power amplifier.

A dual operation mode power amplifier is disclosed. In the power amplifier in accordance with an embodiment of the present invention, a bias circuit part can be converted to decrease power consumption. Different from the prior art, performance of the present invention is not reduced in a high power mode, and no additional passive components like inductors or transformers with a large area are necessary to be further added. Furthermore, a tunable impedance matching circuit provides impedances respectively matching impedances of a fully differential amplifier and a single-ended amplifier, thereby improving the performance of the power amplifier.