A system for testing a subject transistor with constant power. The system may include an amplifier, a measurement voltage source, and a exercise voltage source. The amplifier may have an output connected to a gate of the subject transistor. The amplifier may have a first input and a second input. The measurement voltage source may be connected to the first input of the amplifier for use in measuring characteristics of the subject transistor. The exercise voltage source may be connected to the first input of the amplifier for exercising the subject transistor. The second input of the amplifier may be connected to a source of the subject transistor through a resistor.

A circuit includes a first system-on-chip (SoC) driven by a first clock generator and a second SoC driven by a second clock generator where the first clock generator and the second clock generator have independent time bases. The first and second clock generators are synchronized using an RLC circuit external to the first clock generator and the second clock generator that converts an output of the first clock generator into current pulses and injects the current pulses into the second clock generator to pull an output of the second clock generator into synchronization with the output of the first clock generator. The RLC circuit converts a voltage output of the first clock generator into current pulses at the resonant frequency or specific harmonics of the output of the first clock generator. The second clock generator may include a ring oscillator into which the current pulses are injected.

A transformer is provided. The transformer includes at least one first primary turn; at least one second primary turn; and a first secondary turn and a second secondary turn. The first secondary turn and the second secondary turn are arranged laterally between the at least one first primary turn and the at least one second primary turn. The first secondary turn and the second secondary turn are arranged one above the other.

An operational amplifier comprises: a first amplifier stage 4 comprising a first differential pair of transistors 8, 10 arranged to receive and amplify a differential input signal 18, 20 thereby providing a first differential output signal 22, 24; and a second amplifier stage 6 comprising a second differential pair of transistors 26, 28 arranged to receive and amplify the first differential output signal 22, 24 thereby providing a second differential output signal 38, 40.

A method can be used to measure a load driven by a switching amplifier having a differential input, an LC output demodulator filter and a feedback network between the amplifier output and the differential input. The amplifier is AC driven in a differential and in a common mode by applying a common. The feedback network provides feedback towards the differential input from downstream the LC demodulator filter by computing the impedance of the load as a function of the differential mode output current and the common mode output current. The feedback network provides feedback towards the differential input from upstream the LC demodulator filter by measuring the impedance value of the inductor of the LC demodulator filter, and computing the impedance of the load as a function of the differential mode output current, the common mode output current and the impedance value of the inductor of the LC demodulator filter.

An analog front-end circuit capable of dynamically adjusting gain includes a programmable gain amplifier (PGA) circuit, a sensor, a calculation circuit, a gain coarse control circuit and a gain fine control circuit. The PGA circuit includes an amplifier, a gain coarse adjustment circuit and a gain fine adjustment circuit. The gain coarse adjustment circuit is controlled by a coarse control signal, and a gain is adjusted in a coarse step according to an initial gain. The gain fine adjustment circuit is controlled by a fine control signal in a data mode, and the gain is adjusted in a fine step. The calculation circuit calculates a primary gain adjustment and a secondary gain adjustment. The gain coarse control circuit generates the coarse control signal according to the primary gain adjustment, and the gain fine control circuit generates the fine control signal according to the secondary gain adjustment.

A variable current trans-impedance amplifier (TIA) for an ultrasound device is described. The TIA may be coupled to an ultrasonic transducer to amplify an output signal of the ultrasonic transducer representing an ultrasound signal received by the ultrasonic transducer. During acquisition of the ultrasound signal by the ultrasonic transducer, one or more current sources in the TIA may be varied.

In at least one embodiment, a method for operating a receiver includes configuring a receiver front-end circuit of the receiver according to a selected power consumption configuration. The method includes adjusting a quiescent current of a programmable flat gain stage coupled to the receiver front-end circuit according to the selected power consumption configuration to compensate for any gain loss of the receiver front-end circuit in the selected power consumption configuration. The selected power consumption configuration may be a reduced power consumption configuration and the programmable flat gain stage may be configured to at least partially compensate for the gain loss of the receiver front-end circuit in the reduced power consumption configuration.

In one aspect, an analog-to-digital converter circuit includes a transimpedance amplifier including a feedback capacitor electrically connected between an inverting or a non-inverting input of the transimpedance amplifier and an output of the transimpedance amplifier. The circuit includes an hourglass switch electrically connected on a first side to a first input and a second input, and electrically connected on a second side to the non-inverting input and the inverting input. A fine input current to the transimpedance amplifier is received at the first and second inputs. In a first mode, the hourglass switch electrically connects the first input to the non-inverting input and the second input to the inverting input, and in a second mode, the hourglass switch electrically connects the second input to the non-inverting input and the first input to the inverting input.

A receiver front-end includes a first peaking gain stage configured to amplify a received differential pair of signals received on an input differential pair of nodes. The first peaking gain stage has a first frequency response including a first peak gain at or near a carrier frequency in a first pass band. The first peak gain occurs just prior to a first cutoff frequency. A second peaking gain stage is configured to amplify a differential pair of signals generated by the first peaking gain stage. The second peaking gain stage has a high input impedance and a second frequency response including a second peak gain at or near the carrier frequency in a second pass band. The second peak gain occurs just prior to a second cutoff frequency. The first peaking gain stage and the second peaking gain stage have a cascaded peak gain at or near the carrier frequency.