In certain aspects, an amplifier includes a first transistor including a gate, a drain, and a source, wherein the gate of the first transistor is coupled to a first input of the amplifier. The amplifier also includes a second transistor including a gate, a drain, and a source, wherein the gate of the second transistor is coupled to a second input of the amplifier. The amplifier further includes a first signal path coupled between the first input of the amplifier and the source of the second transistor, a second signal path coupled between the second input of the amplifier and the source of the first transistor, a first load coupled to the drain of the first transistor, and a second load coupled to the drain of the second transistor.

The present invention relates to an amplification device (10) of an input signal comprising: a first amplification stage (12), a second amplification stage (14), each amplification stage (12, 14) comprising: a switching circuit (22), the switching circuit (22) being able to generate, as output (22A, 22B), a switched signal having at least two states, and an inductive element (24) able to smooth the switched signal to obtain a smoothed signal (I1, I3), the smoothed signal (I1, I3) having a useful component and a stray component. The amplification device (10) further comprises a compensation circuit (16), for each amplification stage (12, 14), able to generate a compensation signal (I2, I4) of the stray component of the smoothed signal (I1, I3) generated in the inductive element (24) of the corresponding amplification stage (12, 14).

Amplifier configuration for load-line enhancement is described herein. In some implementations, an apparatus includes an amplifier. The amplifier includes at least one plus transistor stack, at least one minus transistor stack, and at least one inductor. The at least one plus transistor stack is coupled to a plus amplifier node and a plus input node. The at least one minus transistor stack is coupled to a minus amplifier node and a minus input node. The at least one inductor is coupled between the plus amplifier node and the minus amplifier node, with the at least one inductor including an inter-inductor node. The amplifier also includes a minus power switch coupled between the minus amplifier node and one or more supply voltages and an inductor power switch coupled between the inter-inductor node and at least one supply voltage.

There is provided a polyphase filter (5) that generates first differential signals from first signals amplified by a first transistor (2-1), outputs the first differential signals from a first output terminal (5-1) and a third output terminal (5-3), generates second differential signals from second signals amplified by a second transistor (2-2), and outputs the second differential signals from the first output terminal (5-1) and the third output terminal (5-3).

The present disclosure describes exemplary line drivers for use in an exemplary wireline transmission device. In some situations, the exemplary line drivers are electrically connected to a wireline communication channel to transmit information. The exemplary line drivers prevent charge sharing with the wireline communication channel. The exemplary line drivers disclosed herein charge various circuit nodes to various logical values, such as a logical zero or a logical one, to prevent charge sharing with the wireline communication channel.

A first transistor, a second transistor, a third transistor, and a fourth transistor, their source terminals being grounded, are provided. Further, a first feedback circuit connected between a gate terminal and a drain terminal in the first transistor, and having first impedance, a second feedback circuit connected between a gate terminal and a drain terminal in the second transistor, and having the first impedance, a current source for outputting a current, a first load circuit connected between the drain terminal of the first transistor and a first output terminal of the current source, and having second impedance, and a second load circuit connected between the drain terminal of the second transistor and a second output terminal of the current source, and having the second impedance are provided.

The present disclosure describes exemplary line drivers for use in an exemplary wireline transmission device. In some situations, the exemplary line drivers are electrically connected to a wireline communication channel to transmit information. The exemplary line drivers prevent charge sharing with the wireline communication channel. The exemplary line drivers disclosed herein charge various circuit nodes to various logical values, such as a logical zero or a logical one, to prevent charge sharing with the wireline communication channel.

A class-F power amplifier (PA) with a matching network is disclosed herein. The class-F PA comprises a first switch and a second switch operating in differential mode, with a second harmonic trap circuitry selectively terminating the drain terminals to ground at a second harmonic frequency. The second harmonic trap circuitry comprises a plurality of lumped inductive and capacitive components. The PA further comprises a common mode trap and a matching network to reduce the imbalance of the drain terminal impedance between first harmonics and third harmonics.

The present disclosure describes exemplary line drivers for use in an exemplary wireline transmission device. In some situations, the exemplary line drivers are electrically connected to a wireline communication channel to transmit information. The exemplary line drivers prevent charge sharing, with the wireline communication channel. The exemplary line drivers disclosed herein charge various circuit nodes to various logical values such as a logical zero or a logical one, to prevent charge sharing with the wireline communication channel.

An integrated circuit includes a first high-pass filter having an input coupled to receive a first signal and an output coupled to a first input of a first differential pair of transistors. A second high-pass filter includes an input coupled to receive a second signal and an output coupled to a second input of the first differential pair of transistors. The second signal may be a complementary signal of the first signal. A second differential pair of transistors includes control electrodes coupled to a first voltage supply terminal. A boost circuit is coupled between the second differential pair of transistors and the first voltage supply terminal. A low-pass filter is coupled between the first differential pair of transistors and the second differential pair of transistors.