In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.

A linear regulator with indirect leakage compensation is presented. The regulator has a pass device coupled between an input voltage and an output node, a feedback loop for controlling the pass device based on a reference voltage and a feedback voltage that depends on an output voltage, an off-state device that is kept in the off-state, and a leakage compensation circuit for sinking a leakage compensation current from the output node, in dependence on a leakage current of the off-state device. The off-state device is coupled between the leakage compensation circuit and an intermediate voltage level of the linear regulator. The intermediate voltage level is a voltage level between the input voltage level and ground, with a magnitude of the intermediate voltage level being smaller than a magnitude of the input voltage level. A corresponding method of operating a linear regulator with leakage compensation is presented.

According to an embodiment, a comparator circuit includes first and second PMOS transistors that compose a differential pair, a first switching transistor with a main current path that is connected between an input terminal and a gate of the first PMOS transistor, a voltage source that applies a reference voltage to a gate of the second PMOS transistor, and a first bias circuit that applies a first bias voltage to a control electrode of the first switching transistor.

A differential amplifier includes first and second MOS transistors of a first conductivity type which constitute a differential input circuit, a bias current source which supplies a bias current to the first and second MOS transistors, and a third MOS transistor of the first conductivity type provided between the bias current source and the first and second MOS transistors and constituted to limit a back-gate voltage of the first and second MOS transistors.

The present technology relates to a comparator that can easily modify operating point potential of the comparator, and an imaging device.

A pixel signal output from a pixel, and, a reference signal with changeable voltage are input to a differential pair. A current mirror connected to the differential pair, and a voltage drop mechanism allowed to cause a predetermined voltage drop is connected between a transistor that configures the differential pair, and a transistor that configures the current mirror. A switch is connected in parallel to the voltage drop mechanism. The present technology can be applied, for example, to an image sensor that captures an image.

Disclosed embodiments include a method for reducing amplifier offset drift comprised of receiving a first differential input signal at a first transistor base terminal and a second differential input signal at a second transistor base terminal, coupling the collector of the first transistor to the emitter of a third transistor and the emitter of the second transistor to the emitter of a fourth transistor, then coupling the base of the third transistor to the base of the fourth transistor. The method is also comprised of coupling the collector of the fourth transistor to an output terminal, generating a temperature dependent error correction current to minimize the difference in the amount of current flowing through the third transistor and the amount of current flowing through the fourth transistor, then injecting the error correction current into the emitter terminal of at least one of either the third transistor or the fourth transistor.

An electrical system includes a power supply and an electrical circuit coupled to the power supply and including an operational amplifier. The operational amplifier includes an input stage and a pre-driver stage coupled to the input stage, wherein the pre-driver stage includes a first input terminal, a second input terminal, and a voltage supply terminal. The operational amplifier also includes an output stage with bipolar transistors coupled to the pre-driver stage. The pre-driver stage is configured to: detect a voltage differential across the first and second input terminals of the pre-driver stage; and provide an adjustable bias current based on the voltage differential.

A circuit includes first and second transistors, an adaptive bias current source circuit, and an adaptive resistance circuit. The first transistor has a control terminal and first and second current terminals. The control terminal of the first transistor being a first input to the circuit. The second transistor has a control terminal and first and second current terminals, and the control terminal of the second transistor is a second input to the circuit. The first and second inputs are differential inputs to the circuit. The adaptive bias current source circuit is coupled to the second current terminal of the first transistor. The adaptive resistance circuit is coupled between the second current terminal of the second transistor and the adaptive bias current source circuit.

A disclosed comparator includes a comparison circuit that performs comparison between an input signal and a reference signal and changes a level of a signal to be output to a first node in accordance with a result of the comparison; and a positive feedback circuit including an amplifier unit that includes a current source load and outputs a signal in accordance with a potential of the first node to a second node and a feedback unit that positively feeds back a signal in accordance with a potential of the second node to the first node. The feedback unit includes a first transistor to which output of the amplifier unit is fed back and a switch that controls turning on or off of the first transistor.

A disclosed comparator includes a comparison circuit including a differential unit that compares an input signal with a reference signal and changes a level of a signal output to a first node in accordance with a result of comparison and an amplifier unit that includes a load element and outputs a signal in accordance with a potential of the first node to a second node, and a positive feedback circuit that is connected to the second node and a third node and changes a level of a signal at the third node at a rate higher than a change rate of a level of a signal at the second node in accordance with a change in a level of a signal at the second node.