H03F2203/45722

Instrumentation amplifier and related apparatus

A feedback network has a feedback output terminal. A digital to analog converter has an analog output terminal. An amplifier includes an input differential pair having an inverting input terminal, a non-inverting input terminal, a first output current terminal and a second output current terminal. The inverting input terminal is coupled to the feedback output terminal, and the non-inverting input terminal is coupled to the analog output terminal. The amplifier includes a feedback differential pair having a third output current terminal, a fourth output current terminal, a first input terminal and a second input terminal. The third output current terminal is coupled to the first output current terminal, and the fourth output current terminal is coupled to the second output current terminal. The amplifier includes an amplifier output terminal coupled to the first input terminal and the second input terminal.

OUTPUT TERMINAL FAULT DETECTION CIRCUIT

A circuit includes a gain stage, first and second amplifiers, and a comparison circuit. The gain stage has an input and an output. The first amplifier has an input and an output. The input of the first amplifier is coupled to the input of the gain stage. The second amplifier has an input and an output. The input of the second amplifier is coupled to the output of the gain stage. The comparison circuit is coupled to the outputs of the first and second amplifiers. The comparison circuit is configured to compare signals on the outputs of the first and second amplifiers and to generate a fault flag signal responsive to the output signal from the first amplifier being different than the output signal from the second amplifier.

INSTRUMENTATION AMPLIFIER AND RELATED APPARATUS
20210111681 · 2021-04-15 ·

A feedback network has a feedback output terminal. A digital to analog converter has an analog output terminal. An amplifier includes an input differential pair having an inverting input terminal, a non-inverting input terminal, a first output current terminal and a second output current terminal. The inverting input terminal is coupled to the feedback output terminal, and the non-inverting input terminal is coupled to the analog output terminal. The amplifier includes a feedback differential pair having a third output current terminal, a fourth output current terminal, a first input terminal and a second input terminal. The third output current terminal is coupled to the first output current terminal, and the fourth output current terminal is coupled to the second output current terminal. The amplifier includes an amplifier output terminal coupled to the first input terminal and the second input terminal.

Track and Hold Circuit
20210050860 · 2021-02-18 ·

Provided is a track-and-hold circuit capable of reducing the power consumption of a differential amplifier circuit while preserving the broadband nature (without narrowing the bandwidth). In the track-and-hold circuit 1 including a differential amplifier circuit 10, a switch circuit 20, and a hold capacitor C.sub.21, the differential amplifier circuit 10 includes a first resistor R.sub.11 having one end connected to a collector electrode of a first transistor Q.sub.11 constituting a differential pair, a second resistor R.sub.12 having one end connected to the collector electrode of a second transistor Q.sub.12 constituting the differential pair, and a third resistor R.sub.13 to which the other end of the first resistor R.sub.11 and the other end of the second resistor R.sub.12 are connected and which is connected between the other ends and a power supply V.sub.CC.

Electrical amplifier and electro-optical device comprising an electrical amplifier
10564450 · 2020-02-18 · ·

An exemplary embodiment of the present invention relates to an electrical amplifier comprising a differential preamplifier having a first output port and a second output port; a first output unit connected to the first output port of the differential preamplifier and a second output unit connected to the second output port of the differential preamplifier, the first and second output units being electrically arranged in parallel relative to each other; and a positive feedback loop that couples the first and second output units and comprises a first capacitor and a second capacitor; wherein each of the first and second output units comprises an emitter-follower unit and a bias transistor that is connected in series with the emitter-follower unit of its output unit; wherein an emitter of the emitter-follower unit of the first output unit is connected to a base of the bias transistor of the second output unit through the first capacitor of the positive feedback loop; and wherein an emitter of the emitter-follower unit of the second output unit is connected to a base of the bias transistor of the first output unit through the second capacitor of the positive feedback loop.

Circuit with voltage drop element
10454430 · 2019-10-22 · ·

A circuit comprises: a circuit input; a circuit output; at least one passive feedback loop coupled between the circuit output and the circuit input; an active element, coupled in a feed-forward path of the circuit between the circuit input and the circuit output and configured to drive the at least one feedback loop in order to establish a function of the circuit, wherein the feed-forward path of the circuit comprises a second node (Vx) and a first node which are internal nodes of the active element and which are coupled between the circuit input and the circuit output, wherein the first node is configured to have a first voltage, the first voltage being a function of the circuit output, wherein the active element comprises a first voltage drop element coupled between the second node (Vx) and the first node.

Track and hold amplifiers

An embodiment includes a track and hold amplifier device. A device may include an emitter follower transistor coupled to each of an input and an output. The device may also include a charging node coupled between the output and a voltage supply, wherein the charging node is also coupled to the input via the emitter follower transistor. Further, the device may include a cascode switch coupled to each of the input and the output. The cascode switch may be configured to cause the emitter follower transistor to operate in a conductive state and charge the charging node during a track mode. The cascode switch may also be configured to cause the emitter follower transistor to operate in a non-conductive state to isolate the charging node from the input during a hold mode. The cascode switch may include a MOS-HBT transistor combination operating in class AB mode.

DC VOLTAGE REGULATION AND TIA WITH INPUT-OUTPUT DC VOLTAGE CONTROL
20240195371 · 2024-06-13 ·

An apparatus, such as a coherent optical receiver, includes a trans-impedance amplifier (TIA) and a low dropout (LDO) voltage regulator circuit for providing a supply voltage to the TIA. The LDO circuit is configured to adjust the supply voltage responsive to a DC voltage at an output of the TIA. In some implementations the LDO circuit may provide only a fraction of a supply current to the TIA, with another fraction provided by a partial current replica source.

TIA WITH TUNABLE GAIN
20240195373 · 2024-06-13 ·

An apparatus, such as a coherent optical receiver, includes a TIA, the TIA including a cascode circuit having a cascode node. A first tunable element is connected to tunably shunt the cascode node to vary a voltage gain of the TIA, e.g., up to a first amount. Implementations of the TIA further include another tunable element connected to vary a load of the cascode circuit to vary the voltage gain, e.g., up to a second amount. A current steering circuit may be provided to vary the voltage gain up to a third amount, each of the amounts being only a fraction of a target voltage gain variation of the TIA.

High gain load circuit for a differential pair using depletion mode transistors

A differential pair gain stage is disclosed. In one embodiment, the gain stage includes a differential pair of depletion-mode transistors, including a first and a second n-type transistor. In certain embodiments of the invention, the depletion mode transistor may be GaN (gallium nitride) field effect transistors. The gain stage includes an active load including one or more depletion mode transistors electrically coupled to at least one of the drains of depletion mode transistors of the differential pair. The active load may include a source follower for maintaining the AC voltages at the drains of the differential pair at a constant value and may further include a casocde stage for setting a fixed drain source voltage across the output transistors to increase the output impedance and gain of the stage.