A receiver front end amplifier capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors, and gate to ground capacitors for each leg can be used to further improve the matching performance of the invention.

A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

RF receive circuitry, which includes a first output impedance matching circuit coupled to a first alpha output of a first alpha LNA, a second output impedance matching circuit coupled to a first beta output of a first beta LNA, and a first dual output RF LNA, is disclosed. The first dual output RF LNA includes the first alpha LNA, the first beta LNA, and a first gate bias control circuit, which is coupled between a first alpha input of the first alpha LNA and ground; is further coupled between a first beta input of the first beta LNA and the ground; is configured to select one of enabled and disabled of the first alpha LNA using an alpha bias signal via the first alpha input; and is further configured to select one of enabled and disabled of the first beta LNA using a beta bias signal via the first beta input.

Described examples include multistage amplifier circuits having first and second forward circuits, a comparator or sensor circuit coupled to sense a signal in the second forward circuit to identify nonlinear operation or slewing conditions in the multistage amplifier circuit, and one or more sample hold circuits operative according to a sensor circuit output signal to selectively maintain the amplitude of an amplifier input signal in the second forward circuit and/or in a feedback circuit in response to the sensor circuit output signal indicating nonlinear operation or slewing conditions in the multistage amplifier circuit. Certain examples further include a clamping circuit operative to selectively maintain a voltage at a terminal of a Miller compensation capacitance responsive to the comparator output signal indicating nonlinear operation or slewing conditions.

A circuit for downlink/uplink operational mode switching in a TDD wireless communication system comprises a field-effect transistor operatively connected to a power amplifier on the downlink path of a RF front-end apparatus in a TDD wireless communication system, a first voltage generator connected to a large-value first resistor, a second voltage generator connected to a second resistor, a large-value hold capacitor, and a sample-and-hold circuit configured to be switched between a reception configuration, wherein the first voltage generator is connected to the gate of the field-effect transistor and the large-value capacitor is connected to the first voltage generator through the first resistor, and a transmission configuration, wherein the gate of the field-effect transistor is connected to the hold capacitor and the hold capacitor is connected to the second voltage generator through the second resistor.

A communication device includes a power amplifier that generates power signals according to one or more operating bands of communication data, with the amplitude being driven and generated in output stages of the power amplifier. The final stage can include an output passive network that suppresses an amplitude modulation-to-phase modulation (AM-PM) distortion. During a back-off power mode a bias of a capacitive unit of the output power network component can be adjusted to minimize an overall capacitance variation. The output passive network can further generate a flat-phase response between dual resonances of operation.

A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

Provided herein are apparatus and methods for protecting radio frequency (RF) amplifiers from overdrive. In certain configurations, an RF amplification system includes a plurality of RF amplification stages including a first amplification stage and a second amplification stage subsequent to the first amplification stage in a signal path. The first amplification stage includes a first stage field-effect transistor (FET), and the second amplification stage includes a second stage FET and a gate-to-drain feedback circuit electrically connected between a gate and a drain of the second stage FET. The RF amplification system further includes an overdrive detection circuit that senses a drain current of the first stage FET to detect when an overdrive condition is present, and that decreases an impedance of the gate-to-drain feedback circuit in response to detection of the overdrive condition such that a gain of the second stage FET is reduced.

A semiconductor apparatus includes a receiver configured to generate an output signal by amplifying an input signal received through a channel, and compensate distortion of the input signal based on a control signal preset according to a voltage level of the input signal, and an internal circuit configured to operate in response to the output signal.

Various embodiments of switched amplifiers are disclosed herein. In some embodiments, a switched amplifier may include a first amplifier; a second amplifier; an input matching network common to both the first and second amplifiers; and at least one switch to couple an input of the switched amplifier, via the input matching network, to one of the first amplifier or the second amplifier. In some embodiments, a switched amplifier may include a first amplifier; a second amplifier; an input matching network common to both the first and second amplifiers or an output matching network common to both the first and second amplifiers; and a bias generation circuit to selectively (1) provide a first bias current to the first amplifier or (2) provide a second bias current to the second amplifier, wherein the second bias current is less than the first bias current.