H03F2203/7231

SWITCHABLE CLAMPS ACROSS ATTENUATORS
20240235596 · 2024-07-11 ·

Methods and devices for limiting the power level of low noise amplifiers (LNA) implemented in radio frequency (RF) receiver front-ends. The described methods are applicable to bypass, low and high gain modes of the LNA. According to the described methods, the decoder allows the signal to be clamped before or after being attenuated. The benefit of such methods is to improve large signal performances (e.g. IIP3, P1dB) of the RF receiver front-end, while still meeting the clamping requirements, or improve (lower) clamped output power, while still meeting large signal performances (e.g. IIP3, P1dB).

Filtering architectures and methods for wireless applications

Filtering architectures and methods for wireless applications. In some embodiments, a wireless architecture can include a pre-amplifier filter configured to filter a signal, and an amplifier assembly configured to amplify the filtered signal. The wireless architecture can further include a filter circuit configured to provide selective filtering of the amplified signal based at least in part on a rejection level of the pre-amplifier filter and a gain of the amplifier assembly. In some embodiments, such a wireless architecture can be implemented in a packaged module or a wireless device.

Multiplexed Multi-stage Low Noise Amplifier Uses Gallium Arsenide and CMOS Dice
20180278215 · 2018-09-27 ·

A gate bias circuit for a plurality of GaAs amplifier stages is a transistor coupled to a temperature compensation current received from a CMOS control stage. A plurality of pHEMPT amplifier stages are coupled to the gate bias circuit and to a control voltage which switches the amplifier stage. A selectively controlled stage pass transistor enables a current mirror between the gate bias circuit and each stage amplifying transistor. The penultimate pHEMPT amplifier stage is coupled to a CMOS amplifier. A CMOS circuit provides both the temperature compensation current by a proportional to absolute temperature (PTAT) circuit and the control voltage enabling each pHEMPT transistor to receive its input signal in combination with the gate bias voltage.

Radio frequency front end transmit and receive path switch gain

A radio frequency front end of a user equipment for reducing power consumption includes a receive chain having a first low noise amplifier stage, a transmit chain including a first power amplifier stage, a transmit bypass path, a receive bypass path and a time division duplex switch. The transmit bypass path is selectively coupled to a transmit signal path at a first intermediate point of the transmit chain, prior to the first power amplifier stage. The receive bypass path is selectively coupled to a receive signal path at a first intermediate point of the receive chain after the first low noise amplifier stage. The time division duplex switch is selectively coupled to an antenna, the transmit bypass path, the receive bypass path, the first power amplifier stage and the first low noise amplifier stage.

RADIO FREQUENCY FRONT END TRANSMIT AND RECEIVE PATH SWITCH GAIN

A radio frequency front end of a user equipment for reducing power consumption includes a receive chain having a first low noise amplifier stage, a transmit chain including a first power amplifier stage, a transmit bypass path, a receive bypass path and a time division duplex switch. The transmit bypass path is selectively coupled to a transmit signal path at a first intermediate point of the transmit chain, prior to the first power amplifier stage. The receive bypass path is selectively coupled to a receive signal path at a first intermediate point of the receive chain after the first low noise amplifier stage. The time division duplex switch is selectively coupled to an antenna, the transmit bypass path, the receive bypass path, the first power amplifier stage and the first low noise amplifier stage.

Apparatus and method for controlling power in a communication system

An apparatus and method for controlling power in a communication system are provided. The method includes amplifying an input signal by a second processor farther from an antenna than a first processor, and determining whether to enable or disable each of the first processor and the second processor based on results from the amplification by the second processor. Another method includes amplifying an input signal from an antenna by a second processor electrically farther from the antenna than a first processor, and determining whether to operate the first processor and the second processor based on a value related to a reception state for the amplified signal by the second processor.

Semiconductor device with improved variable gain amplification

In a semiconductor device, a first variable gain amplifier and a second variable gain amplifier constitute a switched capacitor type variable gain amplifier. A selection switch switches connection among the first variable gain amplifier, the second variable gain amplifier, and a load circuit such that the first variable gain amplifier and the load circuit are connected to each other when an amplification factor of the first variable gain amplifier is a predetermined gain or less, and the second variable gain amplifier is connected between the first variable gain amplifier and the load circuit when the amplification factor of the first variable gain amplifier is larger than the predetermined gain.

SEMICONDUCTOR DEVICE
20180062595 · 2018-03-01 · ·

In a semiconductor device, a first variable gain amplifier and a second variable gain amplifier constitute a switched capacitor type variable gain amplifier. A selection switch switches connection among the first variable gain amplifier, the second variable gain amplifier, and a load circuit such that the first variable gain amplifier and the load circuit are connected to each other when an amplification factor of the first variable gain amplifier is a predetermined gain or less, and the second variable gain amplifier is connected between the first variable gain amplifier and the load circuit when the amplification factor of the first variable gain amplifier is larger than the predetermined gain.

FILTERING ARCHITECTURES AND METHODS FOR WIRELESS APPLICATIONS

Filtering architectures and methods for wireless applications. In some embodiments, a wireless architecture can include a pre-amplifier filter configured to filter a signal, and an amplifier assembly configured to amplify the filtered signal. The wireless architecture can further include a filter circuit configured to provide selective filtering of the amplified signal based at least in part on a rejection level of the pre-amplifier filter and a gain of the amplifier assembly. In some embodiments, such a wireless architecture can be implemented in a packaged module or a wireless device.

Wireless communication device and method of operating the same

A method is provided for operating a radio frequency (RF) receiver including a transimpedance amplifier, a capacitor selectively connected in parallel with the transimpedance amplifier, a channel selection filter unit connected to an output terminal of the transimpedance amplifier, and a variable gain amplification unit selectively connected in parallel with the channel selection filter unit. The method includes measuring signal-to-noise ratio from an output of the RF receiver, and comparing the measured signal-to-noise ratio with a reference signal-to-noise ratio. When the measured signal-to-noise ratio is greater than the reference signal-to-noise ratio, the capacitor is electrically disconnected from being connected in parallel with the transimpedance amplifier and a variation in the measured signal-to-noise ratio is measured. When the measured variation is in tolerance, the channel selection filter is bypassed to select the variable gain amplification unit.