The present invention provides a detection circuit for a connection impedance and an electronic device. The detection circuit includes: a detection operational amplifier module, wherein the detection operational amplifier module includes: a first buffer, a switch unit, and a main operational amplifier; a first input terminal of the first buffer is connected to a first acquisition electrode through a first front-end circuit, an output terminal of the main operational amplifier is connected to a back-end circuit, and an output terminal of the first buffer is connected to a second input terminal of the first buffer; a first terminal of the switch unit is directly or indirectly connected to the first front-end circuit, and a second terminal of the switch unit is connected to the back-end circuit; and the switch unit is configured to: control the first front-end circuit to be directly connected to the back-end circuit, to form a straight-through channel.

A multi-stage amplifier with a high signal-to-noise ratio is introduced. Multiple amplification stages are cascaded between an input terminal and an output terminal of the amplifier. A controller switches the output stage among the multiple amplification stages from a normal mode to an attenuation mode in response to the amplifier input being lower than the threshold. In the attenuation mode, the output stage provides an attenuation resistor coupled in series with the load resistor of the amplifier. Noise is successfully attenuated by the attenuation-mode output stage.

A power amplifier circuit includes a first path and a second path between an input terminal and an output terminal, a first amplifier located in the first path operative in a first mode, a second amplifier located in the second path operative in a second mode, a first matching circuit between the first amplifier and the output terminal in the first path, a first capacitor having a first end connected to the output terminal side of the first matching circuit, and a second end, a first inductor having a first end connected to the second end of the first capacitor and a second end grounded, and a short-circuit switch connected in parallel with the first inductor. The short-circuit switch short-circuits the first and second ends of the first inductor in the first mode and is placed in an open-circuit position in the second mode.

A splitter circuit includes: a signal divider configured to split and transmit a first radio frequency (RF) signal received in a first receiving mode in which a first communication scheme and a second communication scheme are simultaneously performed; a first bypass circuit configured to bypass the signal divider to transmit a second RF signal received in a second receiving mode in which the first communication scheme is performed; and a second bypass circuit configured to bypass the signal divider to transmit a third RF signal received in a third receiving mode in which the second communication scheme is performed.

A splitter circuit includes: a signal divider configured to split and transmit a first radio frequency (RF) signal received in a first receiving mode in which a first communication scheme and a second communication scheme are simultaneously performed; a first bypass circuit configured to bypass the signal divider to transmit a second RF signal received in a second receiving mode in which the first communication scheme is performed; and a second bypass circuit configured to bypass the signal divider to transmit a third RF signal received in a third receiving mode in which the second communication scheme is performed.

A receiver front end amplifier capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors, and gate to ground capacitors for each leg can be used to further improve the matching performance of the invention.

Chopper amplifiers with tracking of multiple input offsets are disclosed herein. In certain embodiments, a chopper amplifier includes chopper amplifier circuitry including an input chopping circuit, an amplification circuit, and an output chopping circuit electrically connected along a signal path. The amplification circuit includes two or more pairs of input transistors, from which a control circuit chooses a selected pair of input transistors to amplify an input signal. The chopper amplifier further incudes an offset correction circuit that senses the signal path to generate an input offset compensation signal for the amplification circuit. Furthermore, the offset correction circuit separately tracks an input offset of each of the two or more pairs of input transistors.

In electronic circuits having various gain states, small gain phase shift differences required among various gain states may pose a challenging problem. The disclosed methods and devices provide solution to such challenge. Electronic circuits are described wherein a first path including an amplifier may be bypassed by a second path including only passive elements and for gain states smaller than 0 dB. In such electronic circuits, a phase shifter included in the second path can be adjusted to address the required phase shift among various gain states.

A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

The disclosed technology is related to a radio-frequency (RF) amplifier having a bypass circuit and a resonant structure to improve performance in a bypass mode (e.g., a low gain mode). The disclosed amplifiers have a resonant structure that effectively isolates an amplifier core from a bypass circuit. For example, in a bypass mode, the resonant structure is configured to create an open impedance looking into the amplifier core input. This effectively removes any loading from the amplifier core to the bypass circuit. The disclosed amplifiers with resonant structures improve linearity performance in bypass modes due at least in part to the open impedance to the amplifier core provided by the resonant structure.